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CY62167ESL-55FNXI PDF预览

CY62167ESL-55FNXI

更新时间： 2024-11-20 20:02:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
17页 497K
描述
Standard SRAM, 1MX16, 55ns, CMOS, PBGA60, WLCSP-60

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CY62167ESL-55FNXI 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：VFBGA,Reach Compliance Code：compliant
HTS代码：8542.32.00.41风险等级：5.71
最长访问时间：55 ns其他特性：IT ALSO OPERATES AT 3V AND 5V NOMINAL SUPPLY
JESD-30 代码：R-PBGA-B60长度：5.814 mm
内存密度：16777216 bit内存集成电路类型：STANDARD SRAM
内存宽度：16功能数量：1
端子数量：60字数：1048576 words
字数代码：1000000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：1MX16封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH并行/串行：PARALLEL
座面最大高度：0.568 mm最大供电电压 (Vsup)：1.95 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.55 mm端子位置：BOTTOM
宽度：4.654 mmBase Number Matches：1

CY62167ESL-55FNXI 数据手册

 浏览型号CY62167ESL-55FNXI的Datasheet PDF文件第2页浏览型号CY62167ESL-55FNXI的Datasheet PDF文件第3页浏览型号CY62167ESL-55FNXI的Datasheet PDF文件第4页浏览型号CY62167ESL-55FNXI的Datasheet PDF文件第5页浏览型号CY62167ESL-55FNXI的Datasheet PDF文件第6页浏览型号CY62167ESL-55FNXI的Datasheet PDF文件第7页 
CY62167ESL MoBL®  
16-Mbit (1 M × 16) Static RAM  
16-Mbit (1  
M × 16 / 2 M × 8) Static RAM  
reduces power consumption by 99% when addresses are not  
toggling. Place the device into standby mode when deselected  
(CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH).  
Features  
■ High speed: 45 ns/55 ns  
■ Temperature range:  
The input and output pins (I/O0 through I/O15) are placed in a  
high impedance state during the following events:  
❐ Industrial: –40 °C to +85 °C  
■ The device is deselected (CE1 HIGH or CE2 LOW)  
■ Outputs are disabled (OE HIGH)  
■ Wide voltage range: 1.65 V to 1.95 V, 2.2 V to 3.6 V and 4.5 V  
to 5.5 V  
■ Ultra-low standby power  
■ Byte High Enable and Byte Low Enable are disabled (BHE,  
BLE HIGH), or a write operation is in progress (CE1 LOW, CE2  
HIGH and WE LOW)  
❐ Typical standby current at 25 °C = 1.5 A  
❐ Typical standby current at 40 °C = 2.5 A  
Write to the device by taking Chip Enable (CE1 LOW and CE2  
HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable  
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7) is  
written into the location specified on the address pins (A0 through  
■ Ultra-low active power  
❐ Active current: ICC = 2.2 mA (typical) at f = 1 MHz  
■ Easy memory expansion with CE1, CE2, and OE Features  
■ Automatic power-down when deselected  
■ CMOS for optimum speed and power  
A19). If Byte High Enable (BHE) is LOW, then data from the I/O  
pins (I/O8 through I/O15) is written into the location specified on  
the address pins (A0 through A19).  
Read from the device by taking Chip Enables (CE1 LOW and  
CE2 HIGH) and Output Enable (OE) LOW while forcing the Write  
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data  
from the memory location specified by the address pins appears  
on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from  
memory appears on I/O8 to I/O15. See Truth Table on page 12  
for a complete description of read and write modes.  
■ Pb-free 60-pin WLCSP packages  
Functional Description  
The CY62167ESL is a high-performance CMOS Static RAM  
organized as 1M words by 16 bits. This device features an  
advanced circuit design that provides an ultra low active current.  
Ultra low active current is ideal for providing More Battery Life  
(MoBL®) in portable applications such as hand-held devices.  
The device also has an automatic power-down feature that  
Logic Block Diagram  
– CY62167ESL  
DATA IN DRIVERS  
A10  
A 9  
A 8  
A 7  
A 6  
A 5  
A 4  
1M × 16  
RAM ARRAY  
I/O0–I/O7  
I/O8–I/O15  
A 3  
A 2  
A 1  
A 0  
COLUMN DECODER  
BHE  
WE  
CE2  
CE2  
CE  
1
PowerDown  
Circuit  
CE  
1
OE  
BHE  
BLE  
BLE  
Cypress Semiconductor Corporation  
Document Number: 001-95928 Rev. *B  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised July 16, 2015  
1234567...17

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