CY62167EV30 Automotive MoBL®
16-Mbit (1M × 16/2M × 8) Static RAM
16-Mbit (1M
× 16/2M × 8) Static RAM
More Battery Life (MoBL®) in portable applications such as
cellular telephones. The device also has an automatic power
Features
down feature that reduces power consumption by 99 percent
when addresses are not toggling. Place the device in standby
mode when deselected (CE1 HIGH or CE2 LOW or both BHE and
■ TSOP I package configurable as 1M × 16 or 2M × 8 SRAM
■ Very high speed: 45 ns
■ Temperature ranges
BLE are HIGH). The input and output pins (I/O0 through I/O15
)
are placed in a high-impedance state when: the device is
deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE
HIGH), both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH), or a write operation is in progress (CE1 LOW,
CE2 HIGH and WE LOW).
❐ Automotive-A: –40 °C to +85 °C
■ Wide voltage range: 2.20 V to 3.60 V
■ Ultra-low standby power
❐ Typical standby current: 1.5 A
❐ Maximum standby current: 12 A
To write to the device, take Chip Enables (CE1 LOW and CE2
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7) is
written into the location specified on the address pins (A0 through
■ Ultra-low active power
❐ Typical active current: 2.2 mA at f = 1 MHz
A
19). If Byte High Enable (BHE) is LOW, then data from the I/O
■ Easy memory expansion with CE1, CE2, and OE Features
■ Automatic power-down when deselected
pins (I/O8 through I/O15) is written into the location specified on
the address pins (A0 through A19).
To read from the device, take Chip Enables (CE1 LOW and CE2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appears
on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O8 to I/O15. See Truth Table on page 12
for a complete description of read and write modes.
■ CMOS for optimum speed and power
■ Offered in Pb-free 48-ball VFBGAand 48-pin TSOP I packages
Functional Description
The CY62167EV30 is a high-performance CMOS static RAM
organized as 1M words by 16 bits or 2M words by 8 bits. This
device features an advanced circuit design that provides an ultra
low active current. Ultra low active current is ideal for providing
For a complete list of related documentation, click here.
Logic Block Diagram
DATA IN DRIVERS
A10
A 9
A 8
A 7
A 6
A 5
A 4
1M × 16 / 2M x 8
RAM Array
I/O0–I/O7
I/O8–I/O15
A 3
A 2
A 1
A 0
COLUMN DECODER
BYTE
BHE
WE
CE2
CE2
CE
1
PowerDown
Circuit
CE
1
OE
BHE
BLE
BLE
Cypress Semiconductor Corporation
Document Number: 38-05446 Rev. *Q
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised August 2, 2018