Datasheet > CY62167EV30LL-45BVXAT

CY62167EV30LL-45BVXAT

更新时间： 2023-12-06 19:42:00

品牌	Logo	应用领域
英飞凌 - INFINEON		静态存储器
页数	文件大小	规格书
19页	346K
描述
Asynchronous SRAM

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中文翻译

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数据手册

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CY62167EV30LL-45BVXAT 数据手册

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CY62167EV30 Automotive MoBL^®

16-Mbit (1M × 16/2M × 8) Static RAM

16-Mbit (1M

× 16/2M × 8) Static RAM

More Battery Life (MoBL^®) in portable applications such as

cellular telephones. The device also has an automatic power

Features

down feature that reduces power consumption by 99 percent

when addresses are not toggling. Place the device in standby

mode when deselected (CE₁HIGH or CE₂LOW or both BHE and

■ TSOP I package configurable as 1M × 16 or 2M × 8 SRAM

■ Very high speed: 45 ns

■ Temperature ranges

BLE are HIGH). The input and output pins (I/O₀through I/O₁₅

)

are placed in a high-impedance state when: the device is

deselected (CE₁HIGH or CE₂LOW), outputs are disabled (OE

HIGH), both Byte High Enable and Byte Low Enable are disabled

(BHE, BLE HIGH), or a write operation is in progress (CE₁LOW,

CE₂HIGH and WE LOW).

❐ Automotive-A: –40 °C to +85 °C

■ Wide voltage range: 2.20 V to 3.60 V

■ Ultra-low standby power

❐ Typical standby current: 1.5 A

❐ Maximum standby current: 12 A

To write to the device, take Chip Enables (CE₁LOW and CE₂

HIGH) and Write Enable (WE) input LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O₀through I/O₇) is

written into the location specified on the address pins (A₀through

■ Ultra-low active power

❐ Typical active current: 2.2 mA at f = 1 MHz

₁₉). If Byte High Enable (BHE) is LOW, then data from the I/O

■ Easy memory expansion with CE₁, CE₂, and OE Features

■ Automatic power-down when deselected

pins (I/O₈through I/O₁₅) is written into the location specified on

the address pins (A₀through A₁₉).

To read from the device, take Chip Enables (CE₁LOW and CE₂

HIGH) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data

from the memory location specified by the address pins appears

on I/O₀to I/O₇. If Byte High Enable (BHE) is LOW, then data from

memory appears on I/O₈to I/O₁₅. See Truth Table on page 12

for a complete description of read and write modes.

■ CMOS for optimum speed and power

■ Offered in Pb-free 48-ball VFBGAand 48-pin TSOP I packages

Functional Description

The CY62167EV30 is a high-performance CMOS static RAM

organized as 1M words by 16 bits or 2M words by 8 bits. This

device features an advanced circuit design that provides an ultra

low active current. Ultra low active current is ideal for providing

For a complete list of related documentation, click here.

Logic Block Diagram

DATA IN DRIVERS

A₁₀

A ₉

A ₈

A ₇

A ₆

A ₅

A ₄

1M × 16 / 2M x 8

RAM Array

I/O₀–I/O₇

I/O₈–I/O₁₅

A ₃

A ₂

A ₁

A ₀

COLUMN DECODER

BYTE

BHE

CE₂

PowerDown

Circuit

BHE

BLE

Cypress Semiconductor Corporation

Document Number: 38-05446 Rev. *Q

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised August 2, 2018

12 3 4 5 6 7...19

中文翻译

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与CY62167EV30LL-45BVXAT相关器件

型号	品牌	获取价格	描述	数据表
CY62167EV30LL-45BVXI	CYPRESS	获取价格	16-Mbit (1M x 16 / 2M x 8) Static RAM
CY62167EV30LL-45BVXI	INFINEON	获取价格	Asynchronous SRAM
CY62167EV30LL-45BVXIT	CYPRESS	获取价格	Standard SRAM, 1MX16, 45ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFBGA-48
CY62167EV30LL-45BVXIT	INFINEON	获取价格	Asynchronous SRAM
CY62167EV30LL-45ZXA	CYPRESS	获取价格	16-Mbit (1M x 16 / 2M x 8) Static RAM
CY62167EV30LL-45ZXA	INFINEON	获取价格	Asynchronous SRAM
CY62167EV30LL-45ZXAT	CYPRESS	获取价格	Standard SRAM, 1MX16, 45ns, CMOS, PDSO48, 12 X 18.40 MM, 1 MM HEIGHT, LEAD FREE, MO-142, T
CY62167EV30LL-45ZXAT	INFINEON	获取价格	Asynchronous SRAM
CY62167EV30LL-45ZXI	CYPRESS	获取价格	16-Mbit (1M x 16 / 2M x 8) Static RAM
CY62167EV30LL-45ZXI	INFINEON	获取价格	Asynchronous SRAM

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