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CY62167EV18LL-55BVXIT PDF预览

CY62167EV18LL-55BVXIT

更新时间： 2023-12-18 00:00:00
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
17页 304K
描述
Standard SRAM, 1MX16, 55ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48

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中文翻译

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CY62167EV18LL-55BVXIT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：VFBGA, BGA48,6X8,30
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.39
最长访问时间：55 nsI/O 类型：COMMON
JESD-30 代码：R-PBGA-B48JESD-609代码：e1
长度：8 mm内存密度：16777216 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
湿度敏感等级：3功能数量：1
端子数量：48字数：1048576 words
字数代码：1000000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：1MX16输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA48,6X8,30封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH并行/串行：PARALLEL
峰值回流温度（摄氏度）：260电源：1.8/2 V
认证状态：Not Qualified座面最大高度：1 mm
最大待机电流：0.00001 A最小待机电流：1 V
子类别：SRAMs最大压摆率：0.03 mA
最大供电电压 (Vsup)：2.25 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.75 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：6 mm
Base Number Matches：1

CY62167EV18LL-55BVXIT 数据手册

 浏览型号CY62167EV18LL-55BVXIT的Datasheet PDF文件第2页浏览型号CY62167EV18LL-55BVXIT的Datasheet PDF文件第3页浏览型号CY62167EV18LL-55BVXIT的Datasheet PDF文件第4页浏览型号CY62167EV18LL-55BVXIT的Datasheet PDF文件第5页浏览型号CY62167EV18LL-55BVXIT的Datasheet PDF文件第6页浏览型号CY62167EV18LL-55BVXIT的Datasheet PDF文件第7页 
CY62167EV18 MoBL®  
16-Mbit (1 M × 16) Static RAM  
16-Mbit (1  
M × 16) Static RAM  
automatic power down feature that reduces power consumption  
by 99 percent when addresses are not toggling. Place the device  
into standby mode when deselected (CE1 HIGH or CE2 LOW or  
both BHE and BLE are HIGH). The input and output pins (I/O0  
through I/O15) are placed in a high impedance state when: the  
device is deselected (CE1HIGH or CE2 LOW); outputs are  
disabled (OE HIGH); both Byte High Enable and Byte Low  
Enable are disabled (BHE, BLE HIGH); and a write operation is  
in progress (CE1 LOW, CE2 HIGH and WE LOW).  
Features  
■ Very high speed: 55 ns  
■ Wide voltage range: 1.65 V to 2.25 V  
■ Ultra low standby power  
❐ Typical standby current: 1.5 A  
❐ Maximum standby current: 12 A  
■ Ultra low active power  
❐ Typical active current: 2.2 mA at f = 1 MHz  
To write to the device, take Chip Enables (CE1 LOW and CE2  
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable  
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7) is  
written into the location specified on the address pins (A0 through  
A19). If Byte High Enable (BHE) is LOW, then data from I/O pins  
(I/O8 through I/O15) is written into the location specified on the  
address pins (A0 through A19).  
■ Easy memory expansion with CE1, CE2, and OE features  
■ Automatic power down when deselected  
■ CMOS for optimum speed and power  
■ Offered in Pb-free 48-ball very fine ball grid array (VFBGA)  
packages  
To read from the device, take Chip Enables (CE1 LOW and CE2  
HIGH) and Output Enable (OE) LOW while forcing the Write  
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data  
from the memory location specified by the address pins appears  
on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from  
memory appears on I/O8 to I/O15. See the Truth Table on page  
11 for a complete description of read and write modes.  
Functional Description  
The CY62167EV18 is a high performance CMOS static RAM  
organized as 1M words by 16 bits. This device features  
advanced circuit design to provide ultra low active current. This  
is ideal for providing More Battery Life(MoBL®) in portable  
applications such as cellular telephones. The device also has an  
For a complete list of related documentation, click here.  
Logic Block Diagram  
DATA IN DRIVERS  
A10  
A 9  
A 8  
A 7  
A 6  
A 5  
1M × 16  
RAM ARRAY  
I/O0–I/O7  
A 4  
I/O8–I/O15  
A 3  
A 2  
A 1  
A 0  
COLUMN DECODER  
BHE  
WE  
CE2  
CE  
CE2  
CE  
1
PowerDown  
Circuit  
1
OE  
BHE  
BLE  
BLE  
Cypress Semiconductor Corporation  
Document Number: 38-05447 Rev. *O  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised January 16, 2015  
1234567...17

中文翻译

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CY62167EV18LL-55BVXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY62167EV18LL-55BVI CYPRESS

完全替代

 16 Mbit (1M x 16) Static RAM
CY62167EV18LL-55BVXI CYPRESS

完全替代

 16-Mbit (1M x 16) Static RAM
CY62167EV18LL-55BAXI CYPRESS

完全替代

 16-Mbit (1M x 16) Static RAM

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CY62167EV30LL CYPRESS

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CY62167EV30LL-45BAXI CYPRESS

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CY62167EV30LL-45BVI CYPRESS

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CY62167EV30LL-45BVI INFINEON

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 		Asynchronous SRAM
CY62167EV30LL-45BVIT INFINEON

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 		Asynchronous SRAM

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