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CY24141-3 PDF预览

CY24141-3

更新时间: 2024-11-23 21:54:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器
页数 文件大小 规格书
6页 70K
描述
MediaClock Graphics Clock Generator

CY24141-3 数据手册

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PRELIMINARY  
CY24141-3  
MediaClock™  
Graphics Clock Generator  
Features  
• Integrated phase-locked loop (PLL)  
• Low-jitter, high-accuracy output  
• 3.3V operation with 2.5V/1.68V output  
• Ultra-linear crystal capacitors  
Benefits  
High-performance PLL tailored for multimedia applications  
Meets critical timing requirements in complex system designs  
Enables application compatibility  
Ensures 0PPM Accuracy  
Part Number Outputs  
CY24141-3  
Input Frequency Range  
18.432 MHz  
Output Frequencies  
2
18.432 MHz, 53.94605395 MHz/54 MHz (selectable)  
Logic Block Diagram  
CLK_A 18.432 MHz  
XIN  
OUTPUT  
DIVIDER  
OSC  
Q
Φ
CLK_B (selectable)  
XOUT  
VCO  
P
PLL  
FS  
AVSS  
AVDD VDDL  
VSSL VDD VSS  
Pin Configurations  
CY24141ZC-3  
16-pin TSSOP  
CY24141 Frequency Select Table  
Frequency Select  
PPM  
1.000073  
0
CLK_B  
53.94605395  
54  
Unit  
MHz  
MHz  
XOUT  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
XIN  
VDD  
AVDD  
FS  
1
0
CLK_A  
N/C  
VSS  
AVSS  
VSSL  
N/C  
11  
10  
VDDL  
N/C  
N/C  
N/C  
9
CLK_B  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-07324 Rev. **  
Revised April 4, 2002  

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