CDCLVP1212

更新时间： 2024-11-24 06:47:07

品牌	Logo	应用领域
德州仪器 - TI		时钟
页数	文件大小	规格书
23页	710K
描述
12 LVPECL Output, High-Performance Clock Buffer

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CDCLVP1212 数据手册

CDCLVP1212

www.ti.com

SCAS886A –AUGUST 2009–REVISED MAY 2010

12 LVPECL Output, High-Performance Clock Buffer

Check for Samples: CDCLVP1212

FEATURES

DESCRIPTION

•

2:12 Differential Buffer

The CDCLVP1212 is a highly versatile, low additive

jitter buffer that can generate 12 copies of LVPECL

clock outputs from one of two selectable LVPECL,

Selectable Clock Inputs Through Control Pin

Universal Inputs Accept LVPECL, LVDS, and

LVCMOS/LVTTL

LVDS, or LVCMOS inputs for

variety of

communication applications. It has a maximum clock

frequency up to 2 GHz. The CDCLVP1212 features

an on-chip multiplexer (MUX) for selecting one of two

inputs that can be easily configured solely through a

control pin. The overall additive jitter performance is

less than 0.1 ps, RMS from 10 kHz to 20 MHz, and

overall output skew is as low as 25 ps, making the

device a perfect choice for use in demanding

applications.

•

12 LVPECL Outputs

Maximum Clock Frequency: 2 GHz

Maximum Core Current Consumption: 88 mA

Very Low Additive Jitter: <100 fs,rms in 10-kHz

to 20-MHz Offset Range

•

2.375-V to 3.6-V Device Power Supply

Maximum Propagation Delay: 550 ps

Maximum Output Skew: 25 ps

The CDCLVP1212 clock buffer distributes one of two

selectable clock inputs (IN0, IN1) to 12 pairs of

differential LVPECL clock outputs (OUT0, OUT11)

with minimum skew for clock distribution. The

CDCLVP1212 can accept two clock sources into an

input multiplexer. The inputs can be LVPECL, LVDS,

or LVCMOS/LVTTL.

LVPECL Reference Voltage, V_{AC_REF}, Available

for Capacitive-Coupled Inputs

•

Industrial Temperature Range: –40°C to +85°C

ESD Protection Exceeds 2 kV (HBM)

Available in 6-mm × 6-mm QFN-40 (RHA)

Package

The CDCLVP1212 is specifically designed for driving

50-Ω transmission lines. When driving the inputs in

single-ended mode, the LVPECL bias voltage

(V_{AC_REF}) should be applied to the unused negative

input pin. However, for high-speed performance up to

2 GHz, differential mode is strongly recommended.

APPLICATIONS

•

Wireless Communications

Telecommunications/Networking

Medical Imaging

The CDCLVP1212 is packaged in a small 40-pin,

6-mm x 6-mm QFN package and is characterized for

operation from –40°C to +85°C.

Test and Measurement Equipment

V_CC

INP0

INN0

INP1

INN1

OUTP[11...0]

OUTN[11...0]

LVPECL

IN_SEL

Reference

Generator

V_{AC_REF}

GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...23

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与CDCLVP1212相关器件

型号	品牌	获取价格	描述	数据表
CDCLVP1212RHAR	TI	获取价格	12 LVPECL Output, High-Performance Clock Buffer
CDCLVP1212RHAT	TI	获取价格	12 LVPECL Output, High-Performance Clock Buffer
CDCLVP1216	TI	获取价格	16 LVPECL Output, High-Performance Clock Buffer
CDCLVP1216RGZR	TI	获取价格	16 LVPECL Output, High-Performance Clock Buffer
CDCLVP1216RGZT	TI	获取价格	16 LVPECL Output, High-Performance Clock Buffer
CDCLVP2102	TI	获取价格	Four LVPECL Output, High-Performance Clock Buffer
CDCLVP2102_16	TI	获取价格	Four-LVPECL Output, High-Performance Clock Buffer
CDCLVP2102RGTR	TI	获取价格	Four LVPECL Output, High-Performance Clock Buffer
CDCLVP2102RGTT	TI	获取价格	Four LVPECL Output, High-Performance Clock Buffer
CDCLVP2104	TI	获取价格	Eight LVPECL Output, High-Performance Clock Buffer

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