CDCLVP2106

更新时间： 2024-11-20 12:55:11

品牌	Logo	应用领域
德州仪器 - TI		时钟
页数	文件大小	规格书
23页	724K
描述
12 LVPECL Output, High-Performance Clock Buffer

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CDCLVP2106 数据手册

CDCLVP2106

www.ti.com

SCAS887A –SEPTEMBER 2009–REVISED AUGUST 2011

12 LVPECL Output, High-Performance Clock Buffer

Check for Samples: CDCLVP2106

FEATURES

DESCRIPTION

The CDCLVP2106 is a highly versatile, low additive

jitter buffer that can generate 12 copies of LVPECL

clock outputs from two LVPECL, LVDS, or LVCMOS

inputs for a variety of communication applications. It

has a maximum clock frequency up to 2 GHz. Each

buffer block consists of one input that feeds two

LVPECL outputs. The overall additive jitter

performance is less than 0.1 ps, RMS from 10 kHz to

20 MHz, and overall output skew is as low as 20 ps,

making the device a perfect choice for use in

demanding applications.

•

Dual 1:6 Differential Buffer

Two Clock Inputs

Universal Inputs Can Accept LVPECL, LVDS,

LVCMOS/LVTTL

•

12 LVPECL Outputs

Maximum Clock Frequency: 2 GHz

Maximum Core Current Consumption: 92 mA

Very Low Additive Jitter: <100 fs,rms in 10-kHz

to 20-MHz Offset Range

The CDCLVP2106 clock buffer distributes two clock

inputs (IN0, IN1) to 12 pairs of differential LVPECL

clock outputs (OUT0, OUT11) with minimum skew for

clock distribution. Each buffer block consists of one

input that feeds two LVPECL clock outputs. The

inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.

•

2.375-V to 3.6-V Device Power Supply

Maximum Propagation Delay: 550 ps

Maximum Within Bank Output Skew: 20 ps

LVPECL Reference Voltage, V_{AC_REF}, Available

for Capacitive-Coupled Inputs

•

Industrial Temperature Range: –40°C to +85°C

The CDCLVP2106 is specifically designed for driving

50-Ω transmission lines. When driving the inputs in

single-ended mode, the LVPECL bias voltage

(V_{AC_REF}) should be applied to the unused negative

input pin. However, for high-speed performance up to

2 GHz, differential mode is strongly recommended.

Available in 6-mm × 6-mm QFN-40 (RHA)

Package

•

ESD Protection Exceeds 2 kV (HBM)

APPLICATIONS

The CDCLVP2106 is characterized for operation

from –40°C to +85°C and is available in a QFN-40,

6-mm × 6-mm package.

•

Wireless Communications

Telecommunications/Networking

Medical Imaging

Test and Measurement Equipment

V_CC

OUTP[5...0]

OUTN[5...0]

INP0

INN0

LVPECL

OUTP[11...6]

OUTN[11...6]

INP1

INN1

Reference

Generator

V_{AC_REF[1, 0]}

GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...23

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与CDCLVP2106相关器件

型号	品牌	获取价格	描述	数据表
CDCLVP2106_16	TI	获取价格	12-LVPECL Output, High-Performance Clock Buffer
CDCLVP2106RHAR	TI	获取价格	12 LVPECL Output, High-Performance Clock Buffer
CDCLVP2106RHAT	TI	获取价格	12 LVPECL Output, High-Performance Clock Buffer
CDCLVP2108	TI	获取价格	16 LVPECL Output, High-Performance Clock Buffer
CDCLVP2108_16	TI	获取价格	16-LVPECL Output, High-Performance Clock Buffer
CDCLVP2108RGZR	TI	获取价格	16 LVPECL Output, High-Performance Clock Buffer
CDCLVP2108RGZT	TI	获取价格	16 LVPECL Output, High-Performance Clock Buffer
CDCLVP215	TI	获取价格	LOW-VOLTAGE DUAL DIFFERENTIAL 1:5 LVPECL CLOCK DRIVER
CDCLVP215RHBR	TI	获取价格	LOW-VOLTAGE DUAL DIFFERENTIAL 1:5 LVPECL CLOCK DRIVER
CDCLVP215RHBT	TI	获取价格	LOW-VOLTAGE DUAL DIFFERENTIAL 1:5 LVPECL CLOCK DRIVER

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