5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 时钟驱动器> CDCLVP2104RHDR
CDCLVP2104RHDR PDF预览

CDCLVP2104RHDR

更新时间： 2024-11-20 12:55:11
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器逻辑集成电路PC
页数 文件大小 规格书
22页 763K
描述
Eight LVPECL Output, High-Performance Clock Buffer

阅读下载

中文翻译

获取价格

CDCLVP2104RHDR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFN
包装说明：VQFN-28针数：28
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.44
Samacsys Confidence：Samacsys Status：Released
Samacsys PartID：605464Samacsys Pin Count：29
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Other
Samacsys Footprint Name：QFN50P500X500X100-29NSamacsys Released Date：2017-01-12 12:59:53
Is Samacsys：N系列：CDC
输入调节：DIFFERENTIALJESD-30 代码：S-PQCC-N28
JESD-609代码：e4长度：5 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER湿度敏感等级：3
功能数量：8反相输出次数：
端子数量：28实输出次数：1
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：OPEN-EMITTER封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装等效代码：LCC28,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法：TR峰值回流温度（摄氏度）：260
电源：2.5/3.3 V最大电源电流（ICC）：78 mA
Prop。Delay @ Nom-Sup：0.45 ns传播延迟（tpd）：0.45 ns
认证状态：Not Qualified座面最大高度：1 mm
子类别：Clock Drivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.375 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5 mm
最小 fmax：2000 MHzBase Number Matches：1

CDCLVP2104RHDR 数据手册

 浏览型号CDCLVP2104RHDR的Datasheet PDF文件第2页浏览型号CDCLVP2104RHDR的Datasheet PDF文件第3页浏览型号CDCLVP2104RHDR的Datasheet PDF文件第4页浏览型号CDCLVP2104RHDR的Datasheet PDF文件第5页浏览型号CDCLVP2104RHDR的Datasheet PDF文件第6页浏览型号CDCLVP2104RHDR的Datasheet PDF文件第7页 
CDCLVP2104  
www.ti.com  
SCAS889A –OCTOBER 2009–REVISED AUGUST 2011  
Eight LVPECL Output,  
High-Performance Clock Buffer  
Check for Samples: CDCLVP2104  
1
FEATURES  
DESCRIPTION  
The CDCLVP2104 is a highly versatile, low additive  
2
•
•
•
Dual 1:4 Differential Buffer  
Two Clock Inputs  
jitter buffer that can generate eight copies of LVPECL  
clock outputs from two LVPECL, LVDS, or LVCMOS  
inputs for a variety of communication applications. It  
has a maximum clock frequency up to 2 GHz. Each  
buffer block consists of one input that feeds two  
LVPECL outputs. The overall additive jitter  
performance is less than 0.1 ps, RMS from 10 kHz to  
20 MHz, and overall output skew is as low as 15 ps,  
making the device a perfect choice for use in  
demanding applications.  
Universal Inputs Can Accept LVPECL, LVDS,  
LVCMOS/LVTTL  
•
•
•
•
Eight LVPECL Outputs  
Maximum Clock Frequency: 2 GHz  
Maximum Core Current Consumption: 78 mA  
Very Low Additive Jitter: <100 fs,rms in 10-kHz  
to 20-MHz Offset Range  
The CDCLVP2104 clock buffer distributes two clock  
inputs (IN0, IN1) to eight pairs of differential LVPECL  
clock outputs (OUT0, OUT7) with minimum skew for  
clock distribution. Each buffer block consists of one  
input that feeds two LVPECL clock outputs. The  
inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.  
•
•
•
•
2.375 V to 3.6 V Device Power Supply  
Maximum Propagation Delay: 450 ps  
Maximum 15 ps Within Bank Output Skew  
LVPECL Reference Voltage, VAC_REF, Available  
for Capacitive-Coupled Inputs  
•
•
Industrial Temperature Range: –40°C to +85°C  
The CDCLVP2104 is specifically designed for driving  
50-Ω transmission lines. When driving the inputs in  
single-ended mode, the LVPECL bias voltage  
(VAC_REF) should be applied to the unused negative  
input pin. However, for high-speed performance up to  
2 GHz, differential mode is strongly recommended.  
Available in 5-mm × 5-mm QFN-28 (RHD)  
Package  
•
ESD Protection Exceeds 2 kV (HBM)  
APPLICATIONS  
The CDCLVP2104 is characterized for operation  
from –40°C to +85°C and is available in a QFN-28,  
5-mm × 5-mm package.  
•
•
•
•
Wireless Communications  
Telecommunications/Networking  
Medical Imaging  
Test and Measurement Equipment  
VCC  
VCC  
VCC  
OUTP[3...0]  
INP0  
INN0  
4
LVPECL  
OUTN[3...0]  
4
OUTP[7...4]  
INP1  
INN1  
4
LVPECL  
OUTN[7...4]  
4
Reference  
Generator  
VAC_REF[1, 0]  
2
CDCLVP2104  
GND  
GND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2011, Texas Instruments Incorporated  
1234567...22

中文翻译

下载PDF

CDCLVP2104RHDR 替代型号

型号 品牌 替代类型 描述 数据表
CDCLVP2104RHDT TI

完全替代

 Eight LVPECL Output, High-Performance Clock Buffer

与CDCLVP2104RHDR相关器件

型号 品牌 获取价格 描述 数据表
CDCLVP2104RHDT TI

获取价格

 		Eight LVPECL Output, High-Performance Clock Buffer
CDCLVP2106 TI

获取价格

 		12 LVPECL Output, High-Performance Clock Buffer
CDCLVP2106_16 TI

获取价格

 		12-LVPECL Output, High-Performance Clock Buffer
CDCLVP2106RHAR TI

获取价格

 		12 LVPECL Output, High-Performance Clock Buffer
CDCLVP2106RHAT TI

获取价格

 		12 LVPECL Output, High-Performance Clock Buffer
CDCLVP2108 TI

获取价格

 		16 LVPECL Output, High-Performance Clock Buffer
CDCLVP2108_16 TI

获取价格

 		16-LVPECL Output, High-Performance Clock Buffer
CDCLVP2108RGZR TI

获取价格

 		16 LVPECL Output, High-Performance Clock Buffer
CDCLVP2108RGZT TI

获取价格

 		16 LVPECL Output, High-Performance Clock Buffer
CDCLVP215 TI

获取价格

 		LOW-VOLTAGE DUAL DIFFERENTIAL 1:5 LVPECL CLOCK DRIVER

与CDCLVP2104RHDR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证