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CDCLVC1310 PDF预览

CDCLVC1310

更新时间: 2024-02-11 16:00:20
品牌 Logo 应用领域
德州仪器 - TI 时钟
页数 文件大小 规格书
28页 1259K
描述
Ten-Output Low-Jitter Low-Power Clock Buffer

CDCLVC1310 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.73其他特性:ALSO OPERATES IN 3.3 V
系列:CDC输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQCC-N32JESD-609代码:e4
长度:5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
最大I(ol):0.024 A湿度敏感等级:2
功能数量:1反相输出次数:
端子数量:32实输出次数:10
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TR峰值回流温度(摄氏度):260
电源:2.5/3.3 V认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.05 ns座面最大高度:1 mm
子类别:Clock Drivers最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5 mm
最小 fmax:200 MHzBase Number Matches:1

CDCLVC1310 数据手册

 浏览型号CDCLVC1310的Datasheet PDF文件第2页浏览型号CDCLVC1310的Datasheet PDF文件第3页浏览型号CDCLVC1310的Datasheet PDF文件第4页浏览型号CDCLVC1310的Datasheet PDF文件第5页浏览型号CDCLVC1310的Datasheet PDF文件第6页浏览型号CDCLVC1310的Datasheet PDF文件第7页 
CDCLVC1310  
www.ti.com  
SCAS917B JULY 2011REVISED FEBRUARY 2012  
Ten-Output Low-Jitter Low-Power Clock Buffer  
Check for Samples: CDCLVC1310  
1
FEATURES  
APPLICATIONS  
High-Performance Crystal Buffer With Ultralow  
Noise Floor of 169 dBc/Hz  
Wireless and Wired Infrastructure  
Networking and Data Communications  
Medical Imaging  
Additive Phase Noise/Jitter Performance Is  
25 fsRMS (Typ.)  
Portable Test and Measurement  
High-End A/V  
Operates with 3.3-V/2.5-V Core and  
3.3-V/2.5-V/1.8-V/1.5-V Output Supply  
Device inputs consist of primary, secondary  
and crystal inputs and can be selected  
manually (through pins) using the input MUX.  
The primary and secondary inputs can accept  
LVPECL, LVDS, HCSL, SSTL or LVCMOS  
signals and crystal input.  
DESCRIPTION  
The CDCLVC1310 is a highly versatile, low-jitter,  
low-power clock fanout buffer which can distribute to  
ten low-jitter LVCMOS clock outputs from one of  
three inputs, whose primary and secondary inputs  
can feature differential or single-ended signals and  
crystal input. Such a buffer is intended for use in a  
variety of mobile and wired infrastructure, data  
communication, computing, low-power medical  
imaging, and portable test and measurement  
applications. When the input is an illegal level, the  
output is at a defined state. The core can be set to  
2.5 V or 3.3 V, and output can be set to 1.5 V, 1.8 V,  
2.5 V or 3.3 V. The CDCLVC1310 can be easily  
configured through pin programming. The overall  
additive jitter performance is 25 fsRMS (typ). The  
CDCLVC1310 is packaged in a small 32-pin 5-mm ×  
5-mm QFN package.  
Crystal Frequencies Supported Are From  
8 MHz to 50 MHz  
Differential and Single-Ended Input  
Frequencies Supported Are up to 200 MHz  
10 Single-Ended LVCMOS Outputs. The  
outputs can operate at 1.5-V, 1.8-V, 2.5-V or  
3.3-V Power-Supply Voltage.  
LVCMOS Outputs Operate up to 200 MHz  
Output Skew Is 30 ps (typ)  
Total Propagation Delay Is 2 ns (typ)  
Synchronous and Glitch-Free Output  
Enable Is Available  
Offered in QFN-32 5-mm × 5-mm Package With  
Industrial Temperature Range of 40°C to 85°C  
Crystal Input Can Be Overdriven With  
LVCMOS Signal up to 50 MHz  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 20112012, Texas Instruments Incorporated  

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