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CDCLVC1112PWR PDF预览

CDCLVC1112PWR

更新时间: 2024-01-08 14:52:33
品牌 Logo 应用领域
德州仪器 - TI 时钟
页数 文件大小 规格书
14页 418K
描述
3.3 V and 2.5 V LVCMOS High-Performance Clock Buffer Family

CDCLVC1112PWR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.27系列:CDC
输入调节:STANDARDJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:7.8 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.012 A
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:24
实输出次数:1最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:2 ns
传播延迟(tpd):2.6 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.05 ns座面最大高度:1.2 mm
子类别:Clock Drivers最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mm最小 fmax:250 MHz
Base Number Matches:1

CDCLVC1112PWR 数据手册

 浏览型号CDCLVC1112PWR的Datasheet PDF文件第2页浏览型号CDCLVC1112PWR的Datasheet PDF文件第3页浏览型号CDCLVC1112PWR的Datasheet PDF文件第4页浏览型号CDCLVC1112PWR的Datasheet PDF文件第5页浏览型号CDCLVC1112PWR的Datasheet PDF文件第6页浏览型号CDCLVC1112PWR的Datasheet PDF文件第7页 
CDCLVC11xx  
www.ti.com  
SCAS895 MAY 2010  
3.3 V and 2.5 V LVCMOS High-Performance Clock Buffer Family  
Check for Samples: CDCLVC11xx  
1
FEATURES  
Operating Temperature Range: –40°C to 85°C  
High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10,  
1:12 LVCMOS Clock Buffer Family  
Available in 8-, 14-, 16-, 20-, 24-Pin TSSOP  
Package (all pin compatible)  
Very Low Pin-to-Pin Skew < 50 ps  
Very Low Additive Jitter < 100 fs  
Supply Voltage: 3.3 V or 2.5 V  
fmax = 250 MHz for 3.3 V  
APPLICATIONS  
General Purpose Communication, Industrial  
and Consumer Applications  
fmax = 180 MHz for 2.5 V  
CLKIN  
1G  
1
2
3
4
5
6
7
8
9
24 Y1  
23 Y3  
22 VDD  
21 Y2  
20 GND  
19 Y5  
18 VDD  
17 Y7  
16 Y8  
15 GND  
14 Y10  
13 VDD  
LV  
CMOS  
LV  
CMOS  
Y0  
Y1  
Y2  
Y3  
CLKIN  
CDCLVC 1102  
CDCLVC 1103  
CDCLVC 1104  
Y0  
LV  
CMOS  
GND  
VDD  
Y4  
LV  
CMOS  
CDCLVC 1106  
CDCLVC 1108  
GND  
Y6  
LV  
CMOS  
VDD  
CDCLVC 1110  
CDCLVC 1112  
Y9 10  
GND 11  
Y11 12  
LV  
CMOS  
Yn  
1G  
DESCRIPTION  
The CDCLVC11xx is a modular, high-performance, low-skew, general purpose clock buffer family from Texas  
Instruments.  
The whole family is designed with a modular approach in mind. It is intended to round up TI's series of LVCMOS  
clock generators.  
There are 7 different fan-out variations, 1:2 to 1:12, available. All of the devices are pin compatible to each other  
for easy handling.  
All family members share the same high performing characteristics like low additive jitter, low skew, and wide  
operating temperature range.  
The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low  
state when 1G is low. Also, versions with synchronized enable control for glitch free switching and three-state  
outputs are planned in future device options.  
The CDCLVC11xx operate in a 2.5 V and 3.3 V environment and are characterized for operation from –40°C to  
85°C.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

CDCLVC1112PWR 替代型号

型号 品牌 替代类型 描述 数据表
CDCLVC1112PW TI

完全替代

3.3 V and 2.5 V LVCMOS High-Performance Clock Buffer Family

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