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CDCE62005RGZT PDF预览

CDCE62005RGZT

更新时间: 2024-01-01 23:17:17
品牌 Logo 应用领域
德州仪器 - TI 时钟发生器
页数 文件大小 规格书
80页 2027K
描述
Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005RGZT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.33Samacsys Description:Texas Instruments CDCE62005RGZT, PLL Frequency Synthesizer, 48-Pin VQFN
系列:CDCE输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQCC-N48JESD-609代码:e4
长度:7 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:48
实输出次数:5最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TR峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mm最小 fmax:1175 MHz

CDCE62005RGZT 数据手册

 浏览型号CDCE62005RGZT的Datasheet PDF文件第2页浏览型号CDCE62005RGZT的Datasheet PDF文件第3页浏览型号CDCE62005RGZT的Datasheet PDF文件第4页浏览型号CDCE62005RGZT的Datasheet PDF文件第5页浏览型号CDCE62005RGZT的Datasheet PDF文件第6页浏览型号CDCE62005RGZT的Datasheet PDF文件第7页 
CDCE62005  
www.ti.com  
SCAS862C NOVEMBER 2008REVISED FEBRUARY 2010  
Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs  
Check for Samples: CDCE62005  
1
FEATURES  
Frequency Synthesizer With PLL/VCO and  
Partially Integrated Loop Filter.  
Independent Coarse Skew Control on all  
Outputs, The coarse skew control does not  
operate for reference input frequencies less  
than 1 MHz  
Fully Configurable Outputs Including  
Frequency, Output Format, and Output Skew.  
Flexible Inputs With Innovative Smart  
Multiplexer Feature:  
Smart Input Multiplexer Automatically  
Switches Between One of Three Reference  
Inputs.  
Two Universal Differential Inputs Accept  
Frequencies in the Range of 40 kHz to  
1500 MHz (LVPECL), 800 MHz (LVDS), or  
250 MHz (LVCMOS).  
Multiple Operational Modes Include Clock  
Generation via Crystal, SERDES Startup Mode,  
Jitter Cleaning, and Oscillator Holdover Mode  
One Auxiliary Input Accepts Crystals in the  
Range of 2 MHz–42 MHz  
Integrated EEPROM Determines Device  
Configuration at Power-up  
Clock Generator Mode Using Crystal Input.  
Excellent Jitter Performance  
Smart Input Multiplexer can be Configured  
to Automatically Switch Between Highest  
Priority Clock Source Available Allowing  
for Fail-safe Operation and Holdover  
Modes.  
Integrated Frequency Synthesizer including  
PLL, Multiple VCOs, and Loop Filter:  
Full Programmability Facilitates Phase  
Noise Performance Optimization Enabling  
Jitter Cleaner Mode.  
Typical Power Consumption 1.7W (See  
Table 44) at 3.3V  
Programmable Charge Pump Gain and  
Loop Filter Settings  
Integrated EEPROM Stores Default Settings;  
Therefore, The Device Can Power up in a  
Known, Predefined State.  
Unique Dual-VCO Architecture Supports a  
Wide Tuning Range 1.750 GHz–2.356 GHz  
Universal Output Blocks Support up to 5  
Differential, 10 Single-ended, or Combinations  
of Differential or Single-ended:  
Offered in QFN-48 Package  
ESD Protection Exceeds 2kV HBM  
Industrial Temperature Range –40°C to 85°C  
0.35 ps RMS (10 kHz to 20 MHz) Output  
Jitter Performance  
APPLICATIONS  
Low Output Phase Noise: –130 dBc/Hz at 1  
MHz offset, Fc = 491.52 MHz  
Data Converter and Data Aggregation Clocking  
Wireless Infrastructure  
Switches and Routers  
Medical Electronics  
Military and Aerospace  
Industrial  
Clock Generation and Jitter Cleaning  
Output Frequency Ranges From 4.25 MHz  
to 1.175 GHz in Synthesizer Mode  
Output Frequency up to 1.5 GHz in Fan-out  
Mode  
LVPECL, LVDS, LVCMOS, and Special High  
Output Swing Modes  
Independent Output Dividers Support  
Divide Ratios from 1–80, Non-continuous  
values supported.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2010, Texas Instruments Incorporated  
 

CDCE62005RGZT 替代型号

型号 品牌 替代类型 描述 数据表
CDCE62005RGZR TI

完全替代

Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
CDCM61002RHBT TI

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CDCM61001RHBT TI

功能相似

One Output, Integrated VCO, Low-Jitter Clock Generator

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