5秒后页面跳转
捷配首页

Datasheet > 微控制器和处理器 > 时钟发生器> CDC924DLR
CDC924DLR PDF预览

CDC924DLR

更新时间： 2024-11-17 13:06:43
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件PC时钟
页数 文件大小 规格书
18页 251K
描述
PC Motherboard 133-MHz Clock Synthesizer w/3-state Outputs 56-SSOP

阅读下载

中文翻译

获取价格

CDC924DLR 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP56,.4针数：56
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.78其他特性：ALSO REQUIRES 2.5V SUPPLY
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：18.415 mm湿度敏感等级：2
端子数量：56最高工作温度：85 °C
最低工作温度：最大输出时钟频率：133 MHz
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP56,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：2.5,3.3 V主时钟/晶体标称频率：14.318 MHz
认证状态：Not Qualified座面最大高度：2.79 mm
子类别：Clock Generators最大供电电压：3.465 V
最小供电电压：3.135 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：OTHER端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.49 mmuPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：1

CDC924DLR 数据手册

 浏览型号CDC924DLR的Datasheet PDF文件第2页浏览型号CDC924DLR的Datasheet PDF文件第3页浏览型号CDC924DLR的Datasheet PDF文件第4页浏览型号CDC924DLR的Datasheet PDF文件第5页浏览型号CDC924DLR的Datasheet PDF文件第6页浏览型号CDC924DLR的Datasheet PDF文件第7页 
CDC924  
133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS  
WITH 3-STATE OUTPUTS  
SCAS607A – NOVEMBER 1998 – REVISED MAY 1999  
DL PACKAGE  
(TOP VIEW)  
Supports Pentium III Class Motherboards  
Uses a 14.318-MHz Crystal Input to  
Generate Multiple Output Frequencies  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
GND  
REF0  
REF1  
V
2.5V  
DD  
Includes Spread Spectrum Clocking (SSC),  
0.5% Downspread for Reduced EMI  
Performance  
2
APIC2  
APIC1  
APIC0  
GND  
3
4
V
V
V
3.3V  
XIN  
DD  
Power Management Control Terminals  
5
6
XOUT  
GND  
V
2.5V  
Low Output Skew and Jitter for Clock  
Distribution  
DD  
7
CPU_DIV2(1)  
CPU_DIV2(0)  
GND  
8
PCI_F  
PCI1  
2.5-V and 3.3-V Supplies  
9
Generates the Following Clocks:  
– 4 CPU (2.5 V, 100/133 MHz)  
– 7 PCI (3.3 V, 33.3 MHz)  
– 1 PCI_F (Free Running, 3.3 V, 33.3 MHz)  
– 2 CPU/2 (2.5 V, 50/66 MHz)  
– 3 APIC (2.5 V, 16.67 MHz)  
– 4 3V66 (3.3 V, 66 MHz)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
3.3V  
V
2.5V  
DD  
DD  
PCI2  
PCI3  
GND  
PCI4  
PCI5  
3.3V  
CPU3  
CPU2  
GND  
V
2.5V  
DD  
CPU1  
CPU0  
GND  
– 2 REF (3.3 V, 14.318 MHz)  
– 1 48MHz (3.3 V, 48 MHz)  
DD  
PCI6  
PCI7  
GND  
GND  
V
3.3V  
DD  
Packaged in 56-Pin SSOP Package  
GND  
Designed for Use with TI’s Direct Rambus  
Clock Generators (CDCR81, CDCR82,  
CDCR83)  
PCI_STOP  
CPU_STOP  
PWR_DWN  
SPREAD  
SEL1  
3V66(0)  
3V66(1)  
V
3.3V  
DD  
description  
GND  
The CDC924 is a clock synthesizer/driver that  
generates system clocks necessary to support  
Intel Pentium III systems on CPU, CPU_DIV2,  
3V66, PCI, APIC, 48MHz, and REF clock signals.  
3V66(2)  
3V66(3)  
SEL0  
V
3.3V  
DD  
V
3.3V  
48MHz  
GND  
DD  
SEL133/100  
All output frequencies are generated from a  
14.318-MHz crystal input. A reference clock input instead of a crystal can be provided at the XIN input. Two  
phase-lockedloops(PLLs)areused, onetogeneratethehostfrequenciesandtheothertogeneratethe48-MHz  
clock frequency. On-chip loop filters and internal feedback loops eliminate the need for external components.  
The host and PCI clock outputs provide low-skew and low-jitter clock signals for reliable clock operation. All  
outputs have 3-state capability, which can be selected via control inputs SEL0, SEL1, and SEL133/100.  
The outputs are either 3.3-V or 2.5-V single-ended CMOS buffers. With a logic high-level on the PWR_DWN  
terminal, the device operates normally, but when a logical low-level input is applied, the device powers down  
completely, with the outputs in a low-level output state. When a high-level is applied to the PCI_STOP or  
CPU_STOP, the outputs operate normally. With a low-level applied to the PCI_STOP or CPU_STOP terminals,  
the PCI or CPU and 3V66 outputs, respectively, are held in a low-level state.  
The CPU bus can operate at 100 MHz or 133 MHz. Output frequency selection is done with corresponding  
setting for SEL133/100 control input. The PCI bus frequency is fixed to 33MHz.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Intel and Pentium III are trademarks of Intel Corporation.  
Direct Rambus and Rambus are trademarks of Rambus Inc.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...18

中文翻译

下载PDF

CDC924DLR 替代型号

型号 品牌 替代类型 描述 数据表
CDC924DLG4 TI

完全替代

 PC Motherboard 133-MHz Clock Synthesizer w/3-state Outputs 56-SSOP
CDC924DL TI

类似代替

 133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS

与CDC924DLR相关器件

型号 品牌 获取价格 描述 数据表
CDC925 TI

获取价格

 		133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS
CDC925_08 TI

获取价格

 		133MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS
CDC925DL TI

获取价格

 		133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS
CDC925DLG4 TI

获取价格

 		133-MHz Clock Synthesizer/Driver for PC Motherboards with 3-State Outputs 56-SSOP
CDC925DLR TI

获取价格

 		133MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56, GREEN, PLASTIC, SSOP-56
CDC925DLRG4 TI

获取价格

 		133MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56, GREEN, PLASTIC, SSOP-56
CDC930 TI

获取价格

 		133-MHz DIFFERENTIAL CLOCK SYNTHESIZER / DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS
CDC930DL ETC

获取价格

 		CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC
CDC930DLR TI

获取价格

 		133MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56, PLASTIC, SSOP-56
CDC950 TI

获取价格

 		133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS

与CDC924DLR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证