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CDC9842DW PDF预览

CDC9842DW

更新时间: 2024-11-20 02:58:15
品牌 Logo 应用领域
德州仪器 - TI 时钟PC驱动信息通信管理光电二极管外围集成电路晶体
页数 文件大小 规格书
7页 99K
描述
PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER

CDC9842DW 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:PLASTIC, SOIC-28针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.24JESD-30 代码:R-PDSO-G28
长度:9.7 mm端子数量:28
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:66 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:SOP28,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
主时钟/晶体标称频率:14.318 MHz认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Clock Generators
最大压摆率:50 mA最大供电电压:3.6 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:BICMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

CDC9842DW 数据手册

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CDC9842  
PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER  
WITH 3-STATE OUTPUTS  
SCAS546B – NOVEMBER 1995 – REVISED MAY 1996  
DW PACKAGE  
(TOP VIEW)  
Provides System Clock Solution for  
Pentium /82430X/82430VX and  
PentiumPro 82440FX Chipsets  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
REF0  
REF1  
CC  
X1  
Four Host-Clock Outputs With  
Programmable Frequency (50 MHz, 60 MHz  
and 66 MHz)  
2
3
X2  
V
CC  
4
GND  
OE  
HCLK0  
HCLK1  
REF2  
SBCLK  
GND  
PCLK0  
PCLK1  
Six PCI Clock Outputs at Half-CPU  
Frequency  
5
6
One 48-MHz Universal Serial Bus (USB)  
Clock Output  
7
8
V
CC  
Three 14.318-MHz Reference Clock Outputs  
9
HCLK2  
HCLK3  
GND  
SEL1  
SEL0  
V
CC  
10  
11  
12  
13  
14  
PCLK2  
PCLK3  
GND  
PCLK4  
PCLK5  
All Output Clock Frequencies Derived From  
a Single 14.31818-MHz Crystal Input  
LVTTL-Compatible Inputs and Outputs  
Internal Loop Filters for Phase-Locked  
Loops Eliminate the Need for External  
Components  
V
CC  
Operates at 3.3 V  
CC  
Packaged in Plastic Small-Outline Package  
description  
The CDC9842 is a high-performance clock synthesizer/driver that generates the system clocks necessary to  
support Pentium /82430X/82430VXandPentiumPro 82440FX chipsets. Four host-clock outputs (HCLKn) are  
programmable to one of three frequencies (50 MHz, 60 MHz, or 66 MHz) via the SEL0 and SEL1 control inputs.  
Six PCI-clock outputs (PCLKn) are half the frequency of CPU clock outputs and are delayed 1 ns to 4 ns from  
the rising edge of the CPU clock. In addition, a universal serial bus (USB) clock output at 48 MHz (SBCLK) and  
three 14.318-MHz reference clock outputs (REF0, REF1, REF2) are provided.  
All output frequencies are generated from a 14.318-MHZ crystal input. A reference clock can be provided at the  
X1 input instead of a crystal input.  
Two phase-locked loops (PLLs) are used to generate the host clock frequency and the 48-MHz clock frequency.  
On-chip loop filters and internal feedback eliminate the need for external components. The PCI-clock  
frequency is derived directly from the host-clock frequency. The PLL circuit can be bypassed in the TEST mode  
(i.e., SEL0 = SEL1 = H) to distribute a test clock provided at the X1 input.  
Thehost-andPCI-clockoutputsprovidelow-skew/low-jitterclocksignalsforreliableclockoperation. Alloutputs  
are 3 state and are enabled via OE.  
BecausetheCDC9842isbasedonPLLcircuitry, itrequiresastabilizationtimetoachievephase-lockofthePLL.  
This stabilization time is required following power up and application of a fixed-frequency, fixed-phase signal  
at the X1 input, as well as following any changes to the OE or SELn inputs.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Pentium is a trademark of Intel Corporation.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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