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CDC922DLR

更新时间： 2024-11-25 02:58:35
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动光电二极管外围集成电路晶体
页数 文件大小 规格书
17页 240K
描述
133MHz CLOCK SYNTHESIZER/DRIVER

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中文翻译

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CDC922DLR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP48,.4针数：48
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.82其他特性：ALSO OPERATES AT 3.3V SUPPLY
JESD-30 代码：R-PDSO-G48长度：15.875 mm
端子数量：48最高工作温度：85 °C
最低工作温度：最大输出时钟频率：133 MHz
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP48,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2.5,3.3 V主时钟/晶体标称频率：14.318 MHz
认证状态：Not Qualified座面最大高度：2.79 mm
子类别：Clock Generators最大压摆率：156 mA
最大供电电压：2.625 V最小供电电压：2.375 V
标称供电电压：2.5 V表面贴装：YES
技术：CMOS温度等级：OTHER
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.49 mmuPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：1

CDC922DLR 数据手册

 浏览型号CDC922DLR的Datasheet PDF文件第2页浏览型号CDC922DLR的Datasheet PDF文件第3页浏览型号CDC922DLR的Datasheet PDF文件第4页浏览型号CDC922DLR的Datasheet PDF文件第5页浏览型号CDC922DLR的Datasheet PDF文件第6页浏览型号CDC922DLR的Datasheet PDF文件第7页 
CDC922  
133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS  
WITH 3-STATE OUTPUTS  
SCAS634 –JULY 28, 1999  
DL PACKAGE  
(TOP VIEW)  
Generates Clocks for Pentium III Class  
Microprocessors  
Supports a Single Pentium III  
Microprocessor  
REF0  
REF1  
3.3V  
GND  
2.5V  
1
48  
47  
46  
45  
44  
43  
V
2
DD  
Uses a 14.318 MHz Crystal Input to  
Generate Multiple Output Frequencies  
V
V
APIC  
GND  
3
DD  
XIN  
XOUT  
GND  
PCI0  
PCI1  
3.3V  
4
Includes Spread Spectrum Clocking (SSC),  
0.34% Downspread for Reduced EMI  
Performance  
V
2.5V  
5
DD  
CPU_DIV2  
6
7
42 GND  
41 2.5V  
40 CPU2  
Power Management Control Terminals  
8
V
DD  
9
Low Output Skew and Jitter for Clock  
Distribution  
DD  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
PCI2  
PCI3  
PCI4  
PCI5  
GND  
PCI6  
PCI7  
GND  
2.5V  
V
DD  
Operates from Dual 2.5-V and 3.3-V  
Supplies  
CPU1  
CPU0  
GND  
Generates the Following Clocks:  
– 3 CPU (2.5 V, 100/133 MHz)  
– 10 PCI (3.3 V, 33.3 MHz)  
– 1 CPU/2 (2.5 V, 50/66 MHz)  
– 1 APIC (2.5 V, 16.67 MHz)  
– 3 3V66 (3.3 V, 66 MHz)  
V
3.3V  
DD  
GND  
V
3.3V  
PWR_DWN  
SPREAD  
SEL1  
DD  
PCI8  
PCI9  
GND  
– 2 REF (3.3 V, 14.318 MHz)  
– 1 48MHz (3.3 V, 48 MHz)  
SEL0  
3V66(0)  
3V66(1)  
3V66(2)  
V
3.3V  
DD  
Packaged in 48-Pin SSOP Package  
48MHz  
Designed for Use with TI’s Direct Rambus  
Clock Generators (CDCR81, CDCR82,  
CDCR83)  
GND  
V
3.3V  
SEL133/100  
DD  
description  
The CDC922 is a clock synthesizer/driver that generates CPU, CPU_DIV2, 3V66, PCI, APIC, 48MHz, and REF  
system clock signals to support computer systems with a single Pentium III class microprocessor.  
All output frequencies are generated from a 14.318-MHz crystal input. Instead of a crystal, a reference clock  
input can be provided at the XIN input. Two phase-locked loops (PLLs) are used to generate the host  
frequencies and the 48-MHz clock frequency. On-chip loop filters and internal feedback eliminate the need for  
external components.  
The host and PCI clock outputs provide low-skew and low-jitter clock signals for reliable clock operation. All  
outputs have 3-state capability, which can be selected via control inputs SEL0, SEL1, and SEL133/100.  
The 48MHz clock can be independently disabled via the control inputs SEL0, SEL1, and SEL133/100. In this  
state, the 48-MHz PLL is disabled and the 48MHz clock is driven to high impedance to reduce component jitter.  
The outputs are either 3.3-V or 2.5-V single-ended CMOS buffers. With a logic high-level on the PWR_DWN  
terminal, the device operates normally, but when a logical low-level input is applied, the device powers down  
completely with the outputs in a low-level output state.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Intel and Pentium III are trademarks of Intel Corporation.  
Direct Rambus and Rambus are trademarks of Rambus Inc.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...17

中文翻译

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CDC922DLR 替代型号

型号 品牌 替代类型 描述 数据表
W199H CYPRESS

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