BUK582-100A

更新时间： 2024-11-28 22:50:23

品牌	Logo	应用领域
恩智浦 - NXP		晶体晶体管
页数	文件大小	规格书
8页	57K
描述
PowerMOS transistor Logic level FET

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中文翻译

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BUK582-100A 数据手册

Philips Semiconductors

Product Specification

PowerMOS transistor

Logic level FET

BUK582-100A

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode

logic level field-effect power

transistor in a plastic envelope

suitable for surface mount

applications.

The device is intended for use in

automotive and general purpose

switching applications.

SYMBOL

PARAMETER

MAX.

UNIT

V_DS

I_D

Drain-source voltage

Drain current (DC)

100

1.7

˚C

Ω

P_tot

T_j

Total power dissipation

Junction temperature

Drain-source on-state

1.8

150

0.31

R_DS(ON)

resistance;

V_GS= 5 V

PINNING - SOT223

PIN CONFIGURATION

SYMBOL

DESCRIPTION

gate

drain

source

drain (tab)

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

V_DGR

±V_GS

I_D

Drain-source voltage

100

1.7

1.1

6.8

1.8

150

Drain-gate voltage

R_GS= 20 kΩ

Gate-source voltage

Drain current (DC)

Drain current (pulse peak value)

Total power dissipation

Storage temperature

Junction Temperature

T_amb= 25 ˚C

T_amb= 100 ˚C

T_amb= 25 ˚C

I_D

I_DM

P_tot

T_stg

T_j

- 55

˚C

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

R_{th j-b}

R_{th j-amb}

From junction to board¹

From junction to ambient

Mounted on any PCB

Mounted on PCB of Fig.17

K/W

1 Temperature measured 1-3 mm from tab.

January 1998

Rev 1.100

12 3 4 5 6 7 8

中文翻译

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