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AT28BV64-30SJ PDF预览

AT28BV64-30SJ

更新时间: 2024-11-28 20:03:23
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
15页 279K
描述
EEPROM, 8KX8, 300ns, Parallel, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOIC-28

AT28BV64-30SJ 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.19
最长访问时间:300 nsJESD-30 代码:R-PDSO-G28
长度:17.9 mm内存密度:65536 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:28
字数:8192 words字数代码:8000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:8KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL编程电压:3 V
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
最长写入周期时间 (tWC):3 msBase Number Matches:1

AT28BV64-30SJ 数据手册

 浏览型号AT28BV64-30SJ的Datasheet PDF文件第2页浏览型号AT28BV64-30SJ的Datasheet PDF文件第3页浏览型号AT28BV64-30SJ的Datasheet PDF文件第4页浏览型号AT28BV64-30SJ的Datasheet PDF文件第5页浏览型号AT28BV64-30SJ的Datasheet PDF文件第6页浏览型号AT28BV64-30SJ的Datasheet PDF文件第7页 
Features  
2.7V to 3.6V Supply  
– Full Read and Write Operation  
Low Power Dissipation  
– 8 mA Active Current  
– 50 µA CMOS Standby Current  
Read Access Time – 300 ns  
Byte Write – 3 ms  
Direct Microprocessor Control  
– DATA Polling  
64K (8K x 8)  
Battery-Voltage  
Parallel  
– READY/BUSY Open Drain Output  
High Reliability CMOS Technology  
– Endurance: 100,000 Cycles  
– Data Retention: 10 Years  
JEDEC Approved Byte-Wide Pinout  
Industrial Temperature Ranges  
EEPROMs  
1. Description  
AT28BV64  
The AT28BV64 is a low-voltage, low-power Electrically Erasable and Programmable  
Read-only Memory specifically designed for battery powered applications. Its 64K of  
memory is organized 8,192 words by 8 bits. Manufactured with Atmel’s advanced  
nonvolatile CMOS technology, the device offers access times to 200 ns with power  
dissipation less than 30 mW. When the device is deselected the standby current is  
less than 50 µA.  
Not Recommended  
for New Designs.  
The AT28BV64 is accessed like a Static RAM for the read or write cycles without the  
need for external components. During a byte write, the address and data are latched  
internally, freeing the microprocessor address and data bus for other operations. Fol-  
lowing the initiation of a write cycle, the device will go to a busy state and  
automatically clear and write the latched data using an internal control timer. The  
device includes two methods for detecting the end of a write cycle, level detection of  
RDY/BUSY and DATA polling of I/O7. Once the end of a write cycle has been  
detected, a new access for a read or write can begin.  
Atmel’s AT28BV64 has additional features to ensure high quality and manufacturabil-  
ity. The device utilizes error correction internally for extended endurance and for  
improved data retention characteristics. An extra 32-bytes of EEPROM are available  
for device identification or tracking.  
0493C–PEEPR–08/07  

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