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ADP5034ACPZ-R2

更新时间: 2024-11-23 19:21:55
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描述
Dual 3 MHz, 1200mA Buck Regulator with Two 300 mA LDOs

ADP5034ACPZ-R2 数据手册

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Dual 3 MHz, 1200 mA Buck  
Regulators with Two 300 mA LDOs  
ADP5034  
Data Sheet  
regulators operate in PWM mode when the load is above a pre-  
defined threshold. When the load current falls below a predefined  
threshold, the regulator operates in power save mode (PSM),  
improving the light load efficiency.  
FEATURES  
Main input voltage range: 2.3 V to 5.5 V  
Two 1200 mA buck regulators and two 300 mA LDOs  
24-lead, 4 mm × 4 mm LFCSP or 28-lead TSSOP package  
Regulator accuracy: 1.8%  
Factory programmable or external adjustable VOUTx  
3 MHz buck operation with forced PWM and auto PWM/PSM  
modes  
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V  
LDO1/LDO2: output voltage range from 0.8 V to 5.2 V  
LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V  
LDO1/LDO2: high PSRR and low output noise  
Table 1. Family Models  
Maximum  
Model  
Channels  
Current  
Package  
ADP5023 2 Buck,1 LDO  
ADP5024 2 Buck,1 LDO  
ADP5034 2 Buck,2 LDOs  
ADP5037 2 Buck,2 LDOs  
800 mA,  
300 mA  
1.2 A,  
300 mA  
1.2 A,  
300 mA  
800 mA,  
300 mA  
LFCSP (CP-24-10)  
LFCSP (CP-24-10)  
LFCSP (CP-24-10),  
TSSOP (RE-28-1)  
LFCSP (CP-24-10)  
APPLICATIONS  
ADP5033 2 Buck,2 LDOs with  
2 EN pins  
800 mA,  
300 mA  
WLCSP (CB-16-8)  
Power for processors, ASICS, FPGAs, and RF chipsets  
Portable instrumentation and medical devices  
Space constrained devices  
The two bucks operate out of phase to reduce the input capaci-  
tor requirement. The low quiescent current, low dropout voltage,  
and wide input voltage range of the ADP5034 LDOs extend the  
battery life of portable devices. The ADP5034 LDOs maintain  
power supply rejection greater than 60 dB for frequencies as  
high as 10 kHz while operating with a low headroom voltage.  
GENERAL DESCRIPTION  
The ADP5034 combines two high performance buck regulators  
and two low dropout (LDO) regulators. It is available in either a  
24-lead 4 mm × 4 mm LFCSP or a 28-lead TSSOP package.  
The high switching frequency of the buck regulators enables tiny  
multilayer external components and minimizes the board space.  
When the MODE pin is set to high, the buck regulators operate in  
forced PWM mode. When the MODE pin is set to low, the buck  
Regulators in the ADP5034 are activated through dedicated  
enable pins. The default output voltages can be externally set in  
the adjustable version, or factory programmable to a wide range  
of preset values in the fixed voltage version.  
TYPICAL APPLICATION CIRCUIT  
AVIN  
HOUSEKEEPING  
C
0.1µF  
AVIN  
VOUT1  
L1 1µH  
VIN1  
SW1  
FB1  
2.3V TO  
5.5V  
V
AT  
OUT1  
1200mA  
C1  
R1  
R2  
4.7µF  
BUCK1  
C5  
10µF  
PGND1  
ON  
EN1  
EN1  
OFF  
MODE  
PWM  
MODE  
PSM/PWM  
VOUT2  
VIN2  
EN2  
MODE  
L2 1µH  
SW2  
FB2  
C2  
4.7µF  
V
AT  
OUT2  
1200mA  
R3  
R4  
BUCK2  
C6  
10µF  
EN2  
EN3  
PGND2  
EN3  
VOUT3  
FB3  
V
AT  
OUT3  
300mA  
LDO1  
(ANALOG)  
R5  
R6  
VIN3  
1.7V TO  
5.5V  
C7  
1µF  
C3  
1µF  
EN4  
ON  
VOUT4  
FB4  
V
AT  
EN4  
OUT4  
300mA  
OFF  
LDO2  
(DIGITAL)  
R7  
R8  
VIN4  
C8  
1µF  
C4  
1µF  
ADP5034  
AGND  
Figure 1.  
Rev. E  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
 

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