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74VCX163245GX_NL PDF预览

74VCX163245GX_NL

更新时间: 2024-11-27 21:20:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路
页数 文件大小 规格书
12页 311K
描述
Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PBGA54, 5.50 MM, LEAD FREE, PLASTIC, MO-205, FBGA-54

74VCX163245GX_NL 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:5.50 MM, LEAD FREE, PLASTIC, MO-205, FBGA-54针数:54
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.69其他特性:2.3V TO 3.6V SUPPLY FOR PORT A; 1.65V TO 2.7V SUPPLY FOR PORT B
系列:ALVC/VCX/AJESD-30 代码:R-PBGA-B54
JESD-609代码:e1长度:8 mm
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:54最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH传播延迟(tpd):6.2 ns
认证状态:Not Qualified座面最大高度:1.4 mm
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:5.5 mmBase Number Matches:1

74VCX163245GX_NL 数据手册

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May 2007  
74VCX163245  
tm  
Low Voltage 16-Bit Dual Supply Translating  
Transceiver with 3-STATE Outputs  
Features  
General Description  
Bidirectional interface between busses ranging from  
The VCX163245 is a dual supply, 16-bit translating  
transceiver that is designed for 2 way asynchronous  
communication between busses at different supply volt-  
ages by providing true signal translation. The supply rails  
1.65V to 3.6V  
(1)  
Supports Live Insertion and Withdrawal  
Static Drive (I /I  
)
OH OL  
consist of V  
, which is a higher potential rail operating  
CCꢀ  
24mꢀ ꢁ 3.0V V  
CC  
CC  
CC  
at 2.3V to 3.6V and V  
, which is the lower potential  
CCB  
1ꢂmꢀ ꢁ 2.3V V  
6mꢀ ꢁ 1.65V V  
rail operating at 1.65V to 2.7V. (V  
must be less than  
CCB  
or equal to V  
for proper device operation). This dual  
CCꢀ  
supply design allows for translation from 1.ꢂV to 2.5V  
busses to busses at a higher potential, up to 3.3V.  
Uses patented Quiet Series™ noise/EMI reduction  
circuitry  
Functionally compatible with 74 series 16245  
Latchup performance exceeds 300mꢀ  
ESD performance:  
The Transmit/Receive (T/R) input determines the direc-  
tion of data flow. Transmit (active-HIGH) enables data  
from ꢀ Ports to B Ports; Receive (active-LOW) enables  
data from B Ports to ꢀ Ports. The Output Enable (OE)  
input, when HIGH, disables both ꢀ and B Ports by plac-  
ing them in a High-Z condition. The ꢀ Port interfaces  
with the higher voltage bus (2.7V to 3.3V); The B Port  
interfaces with the lower voltage bus (1.ꢂV to 2.5V). ꢀlso  
the VCX163245 is designed so that the control pins  
– Human Body Model >2000V  
– Machine model >200V  
ꢀlso packaged in plastic Fine-Pitch Ball Grid ꢀrray  
(FBGꢀ)  
Note:  
(T/R , OE ) are supplied by V .  
n
n
CCB  
1. To ensure the high impedance state during power up  
The 74VCX163245 is suitable for mixed voltage applica-  
tions such as notebook computers using a 1.ꢂV CPU and  
3.3V peripheral components. It is fabricated with an  
ꢀdvanced CMOS technology to achieve high speed oper-  
ation while maintaining low CMOS power dissipation.  
or power down, OE should be tied to V  
through a  
n
CCB  
pull up resistor. The minimum value of the resistor is  
determined by the current sourcing capability of the  
driver.  
Ordering Information  
Order Number  
Package Number  
Package Description  
(2)(3)  
74VCX163245G  
BGꢀ54ꢀ  
54-Ball Fine-Pitch Ball Grid ꢀrray (FBGꢀ), JEDEC MO-205,  
5.5mm Wide  
(3)  
74VCX163245MTD  
MTD4ꢂ  
4ꢂ-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC  
MO-153, 6.1mm Wide  
Notes:  
2. Ordering code “G” indicates Trays.  
3. Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Quiet Series™ is a trademark of Fairchild Semiconductor Corporation.  
©2000 Fairchild Semiconductor Corporation  
74VCX163245 Rev. 1.7  
www.fairchildsemi.com  

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