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74VCX16373 PDF预览

74VCX16373

更新时间: 2024-09-14 04:47:59
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
10页 235K
描述
Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch

74VCX16373 数据手册

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74VCX16373  
Low−Voltage 1.8/2.5/3.3V  
16−Bit Transparent Latch  
With 3.6 VTolerant Inputs and Outputs  
(3State, NonInverting)  
http://onsemi.com  
The 74VCX16373 is an advanced performance, noninverting  
16bit transparent latch. It is designed for very highspeed, very  
lowpower operation in 1.8 V, 2.5 V or 3.3 V systems. The  
VCX16373 is byte controlled, with each byte functioning identically,  
but independently. Each byte has separate Output Enable and Latch  
Enable inputs. These control pins can be tied together for full 16bit  
operation.  
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate  
voltages it may encounter on either inputs or outputs when interfacing  
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V.  
The 74VCX16373 contains 16 Dtype latches with 3state  
3.6 Vtolerant outputs. When the Latch Enable (LEn) inputs are  
HIGH, data on the Dn inputs enters the latches. In this condition, the  
latches are transparent, (a latch output will change state each time its  
D input changes). When LE is LOW, the latch stores the information  
that was present on the D inputs a setup time preceding the  
HIGHtoLOW transition of LE. The 3state outputs are controlled  
by the Output Enable (OEn) inputs. When OE is LOW, the outputs are  
enabled. When OE is HIGH, the standard outputs are in the high  
impedance state, but this does not interfere with new data entering into  
the latches.  
MARKING DIAGRAM  
48  
48  
VCX16373  
AWLYYWW  
1
TSSOP48  
DT SUFFIX  
CASE 1201  
1
A
= Assembly Location  
= Wafer Lot  
WL  
YY  
WW  
= Year  
= Work Week  
PIN NAMES  
Pins  
Function  
OEn  
LEn  
D0D15  
O0O15  
Output Enable Inputs  
Latch Enable Inputs  
Inputs  
Features  
Outputs  
Designed for Low Voltage Operation: V = 1.65 V 3.6 V  
CC  
3.6 V Tolerant Inputs and Outputs  
High Speed Operation:3.0 ns max for 3.0 V to 3.6 V  
ORDERING INFORMATION  
3.9 ns max for 2.3 V to 2.7 V  
Device  
Package  
Shipping  
39 / Rail  
6.8 ns max for 1.65 V to 1.95 V  
74VCX16373DT  
TSSOP  
Static Drive:  
±24 mA Drive at 3.0 V  
±18 mA Drive at 2.3 V  
±6 mA Drive at 1.65 V  
(PbFree)  
74VCX16373DTR  
TSSOP  
2500 / Reel  
(PbFree)  
Supports Live Insertion and Withdrawal  
I Specification Guarantees High Impedance When V = 0 V  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
OFF  
CC  
Near Zero Static Supply Current in All Three Logic States (20 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds ±250 mA @ 125°C  
ESD Performance: Human Body Model >2000 V;  
Machine Model >200 V  
All Devices in Package TSSOP are Inherently PbFree*  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 Rev. 6  
74VCX16373/D  

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