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74VCX16374 PDF预览

74VCX16374

更新时间: 2024-11-24 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 64K
描述
Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs

74VCX16374 数据手册

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October 1997  
Revised April 1999  
74VCX16374  
Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant  
Inputs and Outputs  
General Description  
Features  
1.65V–3.6V VCC supply operation  
The VCX16374 contains sixteen non-inverting D-type flip-  
flops with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. A buffered clock  
(CP) and output enable (OE) are common to each byte and  
can be shorted together for full 16-bit operation.  
3.6V tolerant inputs and outputs  
tPD  
3.0 ns max for 3.0V to 3.6V VCC  
3.9 ns max for 2.3V to 2.7V VCC  
7.8 ns max for 1.65V to 1.95V VCC  
The 74VCX16374 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O compatibility up to 3.6V.  
The 74VCX16374 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal (Note 1)  
Static Drive (IOH/IOL  
)
±24 mA @ 3.0V VCC  
±18 mA @ 2.3V VCC  
±6 mA @ 1.65V VCC  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to V  
through a pull-up resistor; the minimum  
CC  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Descriptions  
74VCX16374MTD  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
OEn  
Description  
Output Enable Input (Active LOW)  
Clock Pulse Input  
Inputs  
CPn  
I0–I15  
O0–O15  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS500066.prf  
www.fairchildsemi.com  

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