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74AUP2G07GM,132 PDF预览

74AUP2G07GM,132

更新时间: 2024-02-03 05:53:09
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
15页 73K
描述
74AUP2G07 - Low-power dual buffer with open-drain output SON 6-Pin

74AUP2G07GM,132 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6
针数:6Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.49
系列:AUP/ULP/VJESD-30 代码:R-PDSO-N6
JESD-609代码:e3长度:1.45 mm
负载电容(CL):30 pF逻辑集成电路类型:BUFFER
最大I(ol):0.0017 A湿度敏感等级:1
功能数量:2输入次数:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装等效代码:SOLCC6,.04,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:1.2/3.3 V
Prop。Delay @ Nom-Sup:20.7 ns传播延迟(tpd):20.7 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:0.5 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):0.8 V
标称供电电压 (Vsup):1.1 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1 mm
Base Number Matches:1

74AUP2G07GM,132 数据手册

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74AUP2G07  
Low-power dual buffer with open-drain output  
Rev. 04 — 11 June 2009  
Product data sheet  
1. General description  
The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of  
the device is an open drain and can be connected to other open-drain outputs to  
implement active-LOW wired-OR or active-HIGH wired-AND functions.  
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire  
VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features  
I Wide supply voltage range from 0.8 V to 3.6 V  
I High noise immunity  
I Complies with JEDEC standards:  
N JESD8-12 (0.8 V to 1.3 V)  
N JESD8-11 (0.9 V to 1.65 V)  
N JESD8-7 (1.2 V to 1.95 V)  
N JESD8-5 (1.8 V to 2.7 V)  
N JESD8-B (2.7 V to 3.6 V)  
I ESD protection:  
N HBM JESD22-A114E Class 3A exceeds 5000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Low static-power consumption; ICC = 0.9 µA (maximum)  
I Latch-up performance exceeds 100 mA per JESD 78 Class II  
I Inputs accept voltages up to 3.6 V  
I Low noise overshoot and undershoot < 10 % of VCC  
I IOFF circuitry provides partial Power-down mode operation  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  
 
 

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