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74AUP2G00DC

更新时间： 2024-02-21 05:53:08

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
16页	84K
描述
Low-power dual 2-input NAND gate

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数据手册

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74AUP2G00DC 数据手册

74AUP2G00

Philips Semiconductors

Low-power dual 2-input NAND gate

74AUP2G00

terminal 1

index area

74AUP2G00

GND

001aae364

001aae363

Transparent top view

Fig 5. Pin conﬁguration SOT833-1 (XSON8)

Fig 6. Pin conﬁguration SOT902-1 (XQFN8)

6.2 Pin description

Table 3.

Symbol

Pin description

Description

SOT765-1 and SOT833-1

SOT902-1

data input 1A

data input 1B

data output 2Y

ground (0 V)

data input 2A

data input 2B

data output 1Y

supply voltage

GND

V_CC

7. Functional description

Table 4.

Function table^[1]

Input

Output

[1] H = HIGH voltage level;

L = LOW voltage level.

74AUP2G00_1

Product data sheet

Rev. 01 — 25 August 2006

3 of 16

1 234 5 6 7...16

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