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W27L01P-70 PDF预览

W27L01P-70

更新时间: 2024-11-07 22:06:15
品牌 Logo 应用领域
华邦 - WINBOND 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 244K
描述
128K X 8 ELECTRICALLY ERASABLE EPROM

W27L01P-70 技术参数

生命周期:Obsolete零件包装代码:QFJ
包装说明:QCCN, LDCC32,.5X.6针数:32
Reach Compliance Code:unknownECCN代码:3A991.B.1.B.2
HTS代码:8542.32.00.51风险等级:5.84
最长访问时间:70 ns命令用户界面:NO
数据轮询:NOJESD-30 代码:R-PQCC-N32
长度:13.97 mm内存密度:1048576 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
电源:3.3 V编程电压:12 V
认证状态:Not Qualified座面最大高度:3.56 mm
最大待机电流:0.00002 A子类别:EEPROMs
最大压摆率:0.03 mA最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
切换位:NO宽度:11.43 mm

W27L01P-70 数据手册

 浏览型号W27L01P-70的Datasheet PDF文件第2页浏览型号W27L01P-70的Datasheet PDF文件第3页浏览型号W27L01P-70的Datasheet PDF文件第4页浏览型号W27L01P-70的Datasheet PDF文件第5页浏览型号W27L01P-70的Datasheet PDF文件第6页浏览型号W27L01P-70的Datasheet PDF文件第7页 
W27L01  
128K × 8 ELECTRICALLY ERASABLE EPROM  
1. GENERAL DESCRIPTION  
The W27L01 is a high speed, low power consumption Electrically Erasable and Programmable Read  
Only Memory organized as 131,072 × 8 bits. It requires only one supply in the range of 3.3V ± 10% in  
normal read mode. The W27L01 provides an electrical chip erase function.  
2. FEATURES  
Single power supply voltage:  
3.3V ±10%  
+12V erase/programming voltage  
Fully static operation  
All inputs and outputs directly TTL/CMOS  
High speed access time:  
compatible  
Three-state outputs  
70/90 nS (max.)  
Read operating current: 15 mA (max.)  
Erase/Programming operating current:  
Available packages: 32-lead PLCC, 32-lead  
30 mA (max.)  
STSOP and 32-lead TSOP.  
Standby current: 20 µA (max.)  
3. PIN CONFIGURATIONS  
4. BLOCK DIAGRAM  
V
DD  
Vss  
V
PP  
Q0  
.
#PGM  
#CE  
OUTPUT  
BUFFER  
#
CONTROL  
DECODER  
.
A
1
6
A
1
2
A
1
5
V
p
p
V
D
D
P
N
C
G
M
Q7  
#OE  
3
2
3
1
4
3
2
1
3
0
5
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
Q0  
29  
28  
27  
26  
25  
24  
23  
22  
21  
A14  
A13  
6
A0  
.
7
A8  
CORE  
ARRAY  
8
A9  
32-lead PLCC  
9
A11  
#OE  
A10  
#CE  
Q7  
.
10  
11  
12  
13  
A16  
1
8
1
9
2
0
1
7
1
1
5
1
6
4
Q
1
Q
2
V
s
Q
3
Q
Q
5
Q
6
4
s
5. PIN DESCRIPTION  
A11  
A9  
1
2
3
4
5
6
7
8
#OE  
A10  
#CE  
Q7  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
SYMBOL  
A0 A16  
Q0 Q7  
#CE  
DESCRIPTION  
A8  
A13  
Address Inputs  
A14  
Q6  
NC  
Q5  
Q4  
Q3  
#PGM  
32-lead TSOP/  
32-lead STSOP  
Data Inputs/Outputs  
Chip Enable  
Output Enable  
Program Enable  
Program/Erase Supply Voltage  
Power Supply  
VDD  
VPP  
V
SS  
9
10  
Q2  
Q1  
Q0  
A16  
A15  
11  
12  
13  
14  
15  
16  
A12  
A7  
A6  
A5  
A4  
#OE  
A0  
A1  
A2  
A3  
#PGM  
VPP  
VDD  
Vss  
Ground  
NC  
No Connection  
Publication Release Date: February 20, 2003  
Revision A3  
- 1 -  

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