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UPD720130GC-9EU-SIN-A PDF预览

UPD720130GC-9EU-SIN-A

更新时间： 2024-09-15 13:02:39
品牌 Logo 应用领域
日电电子 - NEC 外围集成电路时钟
页数 文件大小 规格书
44页 310K
描述
USB Bus Controller, MOS, PQFP100, 14 X 14 MM, PLASTIC, TQFP-100

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中文翻译

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UPD720130GC-9EU-SIN-A 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：14 X 14 MM, PLASTIC, TQFP-100Reach Compliance Code：compliant
风险等级：5.84总线兼容性：IDE
最大时钟频率：30 MHzJESD-30 代码：S-PQFP-G100
JESD-609代码：e4/e6长度：14 mm
端子数量：100最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TFQFP封装形状：SQUARE
封装形式：FLATPACK峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：1.27 mm
最大供电电压：2.7 V最小供电电压：2.3 V
标称供电电压：2.5 V表面贴装：YES
技术：MOS温度等级：COMMERCIAL
端子面层：NICKEL PALLADIUM GOLD/TIN BISMUTH端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：14 mm
uPs/uCs/外围集成电路类型：BUS CONTROLLER, UNIVERSAL SERIAL BUSBase Number Matches：1

UPD720130GC-9EU-SIN-A 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD720130  
USB2.0 to IDE Bridge  
The µPD720130 is designed to perform a bridge between USB 2.0 and ATA/ATAPI. The µPD720130 complies  
with the Universal Serial Bus Specification Revision 2.0 full-/high-speed signaling and works up to 480 Mbps. The  
µPD720130 is integrated CISC processor, ATA/ATAPI controller, endpoint controller (EPC), serial interface engine  
(SIE), and USB2.0 transceiver into a single chip. The USB2.0 protocol and class specific protocol (bulk only  
protocol) are handled by USB2.0 transceiver, SIE, and EPC. And the transport layer is performed by V30MZ CISC  
processor which is in the µPD720130. The software to control the µPD720130 is located in an embedded ROM. In  
the future, the µPD720130 will be released to support external Flash Memory / EEPROM™ option to update function  
by firmware.  
Detailed function descriptions are provided in the following user’s manual. Be sure to read the manual before designing.  
µPD720130 User’s Manual: S16412E  
FEATURES  
•
•
•
•
•
•
•
•
•
•
•
•
Compliant with Universal Serial Bus Specification Revision 2.0 (Data Rate 12/480 Mbps)  
Compliant with ATA/ATAPI-6 (LBA48, PIO Mode 0-4, Multi Word DMA Mode 0-2, Ultra DMA Mode 0-4)  
USB2.0 high-speed bus powered device capability  
Certified by USB implementers forum and granted with USB 2.0 high-speed Logo (TID :40320125)  
One USB2.0 high-speed transceiver / receiver with full-speed transceiver / receiver  
USB2.0 High-speed or Full-speed packet protocol sequencer (Serial Interface Engine)  
Automatic chirp assertion and full-/high-speed mode change  
USB Reset, Suspend and Resume signaling detection  
Supports power control functionality for IDE device as CD-ROM and HDD  
Supports set feature (TEST_MODE) functionality  
System Clock is generated by 30 MHz X’tal  
2.5 V and 3.3 V power supply  
ORDERING INFORMATION  
Part Number  
Package  
µPD720130GC-9EU  
100-pin plastic TQFP (fine pitch) (14 × 14)  
100-pin plastic TQFP (fine pitch) (14 × 14)  
µPD720130GC-9EU-SIN  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. S16302EJ3V0DS00 (3rd edition)  
Date Published June 2003 NS CP (K)  
Printed in Japan  
The mark shows major revised points.  
2002  
1234567...44

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