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UPD72042GT

更新时间： 2024-11-05 22:52:35

品牌	Logo	应用领域
日电电子 - NEC		/
页数	文件大小	规格书
92页	365K
描述
LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

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中文翻译

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数据手册

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UPD72042GT 数据手册

DATA SHEET

MOS INTEGRATED CIRCUIT

µPD72042

LSI DEVICES FOR Inter Equipment Bus^TM(IEBus^TM)

PROTOCOL CONTROL

The µPD72042 is a microcomputer peripheral LSI device for IEBus protocol control.

The µPD72042 performs all the processing required for layers 1 and 2 of the IEBus. The devices incorporate large

transmission and reception buffers, allowing the microcomputer to perform IEBus operations without interruption.

They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.

FEATURES

Control of layers 1 and 2 of the IEBus protocol

• Support of a multi-master scheme

• Broadcast function

Microcomputer interface

•

Three-/two-wire serial I/O,

Transfer starting with MSB

Program crashes can be detected by means of a

watchdog timer.

• Two communication modes having different

transmission speeds can be selected.

•

Low power consumption (standby mode):

50 µA (max)

Transmission speed

Oscillator frequency (fX): 6 MHz

• frequency accuracy: ±1.5%

Operating voltage: 5 V ±10%

Mode 0

Mode 1

Approx. 3.9 Kbps

Approx. 17 Kbps

● Built-in IEBus driver and receiver

● Transmission and reception buffers

Transmission buffer : 33 bytes, FIFO

Reception buffer

: 40 bytes, FIFO (capable of

holdingmorethanoneframe

of reception data.)

ORDERING INFORMATION

Part number

Package

16-pin plastic SOP (9.53 mm (375))

µPD72042GT

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability

and additional information.

Document No. S14870EJ1V0DS00 (1st edition)

Date Published June 2000 N CP(N)

Printed in Japan

2000

12 3 4 5 6 7...92

中文翻译

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