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UPD720133GB-YEU-A PDF预览

UPD720133GB-YEU-A

更新时间： 2024-09-15 21:10:31
品牌 Logo 应用领域
日电电子 - NEC 时钟ISM频段外围集成电路
页数 文件大小 规格书
40页 444K
描述
USB Bus Controller, MOS, PQFP64, 10 X 10 MM, LEAD FREE, PLASTIC, TQFP-64

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中文翻译

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UPD720133GB-YEU-A 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFP
包装说明：TFQFP,针数：64
Reach Compliance Code：compliantECCN代码：3A991.A.2
HTS代码：8542.31.00.01风险等级：5.81
最大时钟频率：30 MHzJESD-30 代码：S-PQFP-G64
JESD-609代码：e6/e4长度：10 mm
端子数量：64最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TFQFP封装形状：SQUARE
封装形式：FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压：2.7 V最小供电电压：2.3 V
标称供电电压：2.5 V表面贴装：YES
技术：MOS温度等级：COMMERCIAL
端子面层：TIN BISMUTH/NICKEL PALLADIUM GOLD端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：10宽度：10 mm
uPs/uCs/外围集成电路类型：BUS CONTROLLER, UNIVERSAL SERIAL BUSBase Number Matches：1

UPD720133GB-YEU-A 数据手册

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PRELIMINARY DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD720133  
USB2.0 to IDE Bridge  
The µPD720133 is designed to function as a bridge between USB 2.0 and ATA/ATAPI. The µPD720133 complies  
with the Universal Serial Bus Specification Revision 2.0 full-/high-speed signaling and works up to 480 Mbps. The  
µPD720133 consists of a CISC processor, an ATA/ATAPI controller, an endpoint controller (EPC), a serial interface  
engine (SIE), and an USB2.0 transceiver. The USB2.0 protocol and class specific protocols (bulk only protocol) are  
handled by the USB2.0 transceiver, the SIE and the EPC. The V30MZ CISC processor in the µPD720133 takes care of  
the activities in the transport layer. The firmware controlling the µPD720133 is located in an embedded ROM.  
FEATURES  
•
•
•
•
•
•
•
•
•
•
•
•
Compliant with Universal Serial Bus Specification Revision 2.0 (Data Rate 12/480 Mbps)  
Compliant with ATA/ATAPI-6 (LBA48, PIO Mode 0-4, Multi Word DMA Mode 0-2, Ultra DMA Mode 0-4)  
USB2.0 high-speed bus powered device capability  
Certified by USB implementers forum and granted with USB 2.0 high-speed Logo (TID: 40001985)  
One USB2.0 high-speed transceiver / receiver with full-speed transceiver / receiver  
USB2.0 High-speed or Full-speed packet protocol sequencer (Serial Interface Engine)  
Automatic chirp assertion and full-/high-speed mode change  
USB Reset, Suspend and Resume signaling detection  
Supports power control functionality for IDE device as CD-ROM and HDD  
Supports set feature (TEST_MODE) functionality  
System Clock is generated by 30 MHz X’tal  
2.5 V and 3.3 V power supply  
ORDERING INFORMATION  
Part Number  
Package  
µPD720133GB-YEU-A 64-pin plastic TQFP (fine pitch) (10 × 10) Lead-free product  
µPD720133GB-YEU-Y 64-pin plastic TQFP (fine pitch) (10 × 10) High heat-resistance product  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. S17100EJ2V0DS00 (2nd edition)  
Date Published June 2004 NS CP (N)  
Printed in Japan  
The mark  
shows major revised points.  
2004  
1234567...40

中文翻译

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