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UPD720200AF1-DAP-A PDF预览

UPD720200AF1-DAP-A

更新时间： 2024-09-15 12:02:27
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管控制器
页数 文件大小 规格书
2页 144K
描述
The μPD720200A is the second generation Universal Serial Bus 3.0 host controller, which complies with Universal Serial Bus 3.0 Specification, and Intel’s eXtensible Host controller interface

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UPD720200AF1-DAP-A 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：10 X 10 MM, 0.65 MM PITCH, PLASTIC, FBGA-176针数：176
Reach Compliance Code：compliantECCN代码：3A001.A.3
HTS代码：8542.31.00.01Factory Lead Time：1 week
风险等级：5.76其他特性：ALSO REQUIRES 3.3 V
总线兼容性：PCI最大时钟频率：48 MHz
JESD-30 代码：S-PBGA-B176端子数量：176
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装形状：SQUARE封装形式：GRID ARRAY
峰值回流温度（摄氏度）：NOT SPECIFIED标称供电电压：1.05 V
表面贴装：YES技术：CMOS
端子形式：BALL端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIEDuPs/uCs/外围集成电路类型：BUS CONTROLLER, UNIVERSAL SERIAL BUS
Base Number Matches：1

UPD720200AF1-DAP-A 数据手册

 浏览型号UPD720200AF1-DAP-A的Datasheet PDF文件第2页 
Product Brief  
USB3.0 Host Controller  
μPD720200A  
The μPD720200A is the second generation Universal Serial Bus 3.0 host controller,  
which complies with Universal Serial Bus 3.0 Specification, and Intel’s eXtensible Host  
Controller Interface (xHCI).  
The μPD720200A uses a PCI Express® Gen 2 system interface bus allowing system designers to easily add up to two USB3.0 SuperSpeed  
interfaces to systems containing the PCI Express bus interface. When connected to USB 3.0-compliant peripherals, the μPD720200A can  
transfer information at clock speeds of up to 5 Gbps. The μPD720200Aand USB 3.0 standard are fully compliant and backward compatible with  
the previous USB2.0 Standard. The new USB 3.0 standard supports data transfer speeds of up to ten times faster than those of the  
previous-generation USB2.0 standard, enabling quick and efficient transfers of large amount of information.  
Block Diagram  
USB Port1  
(SS)  
USB3.0  
SS Link  
Super-speed  
Controller  
Interface  
USB3.0  
(Super-speed)  
PHY  
USB3.0  
SS Root hub  
USB Port2  
(SS)  
Power SW  
I/F  
Port Power  
Control  
PCI Express  
Gen2 Interface  
(x 1)  
PCI Express  
Port  
xHCI  
Controller  
High-speed  
Controller  
Interface  
USB2.0  
SIE  
USB Port1  
(HS/FS/LS)  
USB2.0  
(HS/FS/LS)  
PHY  
USB2.0  
Root hub  
USB Port2  
(HS/FS/LS)  
Full/Low-speed  
Controller  
Interface  
SPI  
Interface  
OSC/PLL  
24 MHz Xtal  
48 MHz clock input  
External  
Serial ROM  
3.3 V 1.05 V  
USB 3.0 Host Controller μPD720200A Specification  
Differences with the first generation μPD720200  
z
z
System clock : 24 MHz crystal or 48 MHz external clock  
3.3 V and 1.05 V Power supply  
z
z
Improved power consumption  
Pin compatible with the first generation μPD720200  
Part Number  
z
μPD720200AF1-DAP-A  
Features  
z
z
z
Universal Serial Bus 3.0 specification Revision 1.0  
Package  
PCI Express Base Specification Revision 2.0  
Intel’s eXtensible Host Controller Interface (xHCI) Specification  
Revision 0.96  
z
176-pin plastic FBGA (10 x 10 mm, 0.65 mm ball pitch)  
Target Systems  
z
z
z
z
Desktop and Laptop computers  
z
z
z
z
PCI Express Card Electromechanical Specification Revision 2.0  
PCI Bus Power Management Interface Specification Revision 1.2  
Support USB legacy function  
PCI Express Card / Express Card  
Docking Station  
Server  
Supports Serial Peripheral Interface (SPI) type ROM  
R19PF0029EJ0100 Rev. 1.00  
Renesas Electronics Corporation  
www.renesas.com  
2010.09  
12

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