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TC7SH08FU(TE85L,JF PDF预览

TC7SH08FU(TE85L,JF

更新时间: 2024-11-05 15:53:59
品牌 Logo 应用领域
东芝 - TOSHIBA 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 161K
描述
AND Gate 1-Element 2-IN CMOS 5-Pin SSOP T/R

TC7SH08FU(TE85L,JF 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:unknown
风险等级:5.75系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G5长度:2 mm
逻辑集成电路类型:AND GATE功能数量:1
输入次数:2端子数量:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):14 ns
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.25 mm
Base Number Matches:1

TC7SH08FU(TE85L,JF 数据手册

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TC7SH08F/FU  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC7SH08F, TC7SH08FU  
2-Input AND Gate  
Features  
TC7SH08F  
High speed operation  
: t = 4.3ns (typ.) at V  
= 5V, 15pF  
pd  
CC  
Low power dissipation : I  
= 2 μA (max) at Ta = 25°C  
CC  
High noise immunity  
5.5-V tolerant inputs  
: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Wide operating voltage range : V  
= 2 to 5.5 V  
CC  
(SMV)  
TC7SH08FU  
Marking  
Product name  
H 2  
(USV)  
Weight  
SSOP5-P-0.95 : 0.016 g (typ.)  
SSOP5-P-0.65A : 0.006 g (typ.)  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Supply voltage  
Symbol  
Rating  
Unit  
Pin Assignment (top view)  
V
0.5 to 7  
0.5 to 7  
V
V
CC  
DC input voltage  
V
IN  
DC output voltage  
Input diode current  
Output diode current  
DC output current  
V
0.5 to V  
+ 0.5  
V
IN B  
IN A  
GND  
1
2
3
5
V
CC  
OUT  
CC  
I
20  
mA  
mA  
mA  
mA  
mW  
°C  
IK  
I
± 20 (Note1)  
± 25  
OK  
I
OUT  
DC V /ground current  
CC  
I
± 50  
4
OUT Y  
CC  
Power dissipation  
P
200  
D
Storage temperature  
Lead temperature (10 s)  
T
65 to 150  
260  
stg  
T
°C  
L
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even  
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings and the operating ranges.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Note1: VOUT < GND, VOUT > VCC  
1
2009-09-09  

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