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TC7SH08FU,LJ(CT PDF预览

TC7SH08FU,LJ(CT

更新时间: 2024-11-21 21:03:19
品牌 Logo 应用领域
东芝 - TOSHIBA 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 128K
描述
IC GATE AND 1CH 2-INP USV

TC7SH08FU,LJ(CT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:TSSOP,
Reach Compliance Code:unknownFactory Lead Time:12 weeks
风险等级:5.74系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G5长度:2 mm
逻辑集成电路类型:AND GATE功能数量:1
输入次数:2端子数量:5
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):15.5 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:1.25 mmBase Number Matches:1

TC7SH08FU,LJ(CT 数据手册

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TC7SH08FU  
CMOS Digital Integrated Circuits Silicon Monolithic  
TC7SH08FU  
1. Functional Description  
2-Input AND Gate  
2. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature range: Topr = -40 to 125 (Note 2)  
(3) High speed operation: tpd = 4.3 ns (typ.) (VCC = 5.0 V, CL = 15 pF)  
(4) Low power dissipation: ICC = 2.0 µA (max) (Ta = 25 )  
(5) High noise immunity: VNIH = VNIL = 28 % VCC (min)  
(6) 5.5 V tolerant inputs  
(7) Wide operating voltage range: VCC = 2.0 to 5.5 V  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
Note 2: For devices with the ordering part number ending in J(CT. Topr = -40 to 85 for the other devices.  
3. Packaging  
USV  
Start of commercial production  
1993-09  
©2016 Toshiba Corporation  
2017-05-16  
Rev.3.0  
1

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