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TC7SH09FU,LJ(CT PDF预览

TC7SH09FU,LJ(CT

更新时间: 2024-11-05 19:52:15
品牌 Logo 应用领域
东芝 - TOSHIBA 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 130K
描述
IC GATE AND 1CH 2-INP

TC7SH09FU,LJ(CT 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:TSSOP,Reach Compliance Code:unknown
Factory Lead Time:12 weeks风险等级:1.55
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G5
长度:2 mm逻辑集成电路类型:AND GATE
功能数量:1输入次数:2
端子数量:5最高工作温度:125 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):14 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:1.25 mmBase Number Matches:1

TC7SH09FU,LJ(CT 数据手册

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TC7SH09FU  
CMOS Digital Integrated Circuits Silicon Monolithic  
TC7SH09FU  
1. Functional Description  
2-Input AND Gate (Open Drain)  
2. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature : Topr =-40 to 125 (Note 2)  
(3) High speed operation: tpZL = 3.2 ns (typ.) (VCC = 5.0 V, CL = 15 pF)  
(4) Low power dissipation: ICC = 2.0 µA (max) (Ta = 25 )  
(5) Wide operating voltage range: VCC = 2.0 to 5.5 V  
(6) 5.5 V tolerant inputs  
(7) 5.5 V power down protection output  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
Note 2: For devices with the ordering part number ending in J(CT. Topr = -40 to 85 for the other devices.  
3. Packaging  
USV  
Start of commercial production  
2011-08  
©2016 Toshiba Corporation  
2017-05-16  
Rev.4.0  
1

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