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SST25VF512-20-4C-QA

更新时间： 2024-11-09 22:18:59
品牌 Logo 应用领域
SST 闪存内存集成电路光电二极管时钟
页数 文件大小 规格书
23页 264K
描述
512 Kbit SPI Serial Flash

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中文翻译

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SST25VF512-20-4C-QA 数据手册

 浏览型号SST25VF512-20-4C-QA的Datasheet PDF文件第2页浏览型号SST25VF512-20-4C-QA的Datasheet PDF文件第3页浏览型号SST25VF512-20-4C-QA的Datasheet PDF文件第4页浏览型号SST25VF512-20-4C-QA的Datasheet PDF文件第5页浏览型号SST25VF512-20-4C-QA的Datasheet PDF文件第6页浏览型号SST25VF512-20-4C-QA的Datasheet PDF文件第7页 
512 Kbit SPI Serial Flash  
SST25VF512  
SST25VF512512Kb Serial Peripheral Interface (SPI) flash memory  
Data Sheet  
FEATURES:  
•
•
Single 2.7-3.6V Read and Write Operations  
•
Auto Address Increment (AAI) Programming  
– Decrease total chip programming time over  
Byte-Program operations  
End-of-Write Detection  
– Software Status  
Hold Pin (HOLD#)  
– Suspends a serial sequence to the memory  
without deselecting the device  
Write Protection (WP#)  
– Enables/Disables the Lock-Down function of the  
status register  
Software Write Protection  
– Write protection through Block-Protection bits in  
status register  
Serial Interface Architecture  
– SPI Compatible: Mode 0 and Mode 3  
20 MHz Max Clock Frequency  
Superior Reliability  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
Low Power Consumption:  
– Active Read Current: 7 mA (typical)  
– Standby Current: 8 µA (typical)  
Flexible Erase Capability  
– Uniform 4 KByte sectors  
– Uniform 32 KByte overlay blocks  
Fast Erase and Byte-Program:  
•
•
•
•
•
•
•
•
•
•
Packages Available  
– Chip-Erase Time: 70 ms (typical)  
– Sector- or Block-Erase Time: 18 ms (typical)  
– Byte-Program Time: 14 µs (typical)  
– 8-lead SOIC (4.9mm x 6mm)  
– 8-contact WSON  
PRODUCT DESCRIPTION  
SST’s serial flash family features a four-wire, SPI-compati-  
ble interface that allows for a low pin-count package occu-  
pying less board space and ultimately lowering total system  
costs. SST25VF512 SPI serial flash memory is manufac-  
tured with SST’s proprietary, high-performance CMOS  
SuperFlash technology. The split-gate cell design and  
thick-oxide tunneling injector attain better reliability and  
manufacturability compared with alternate approaches.  
rent, and time of application. Since for any given voltage  
range, the SuperFlash technology uses less current to pro-  
gram and has a shorter erase time, the total energy con-  
sumed during any Erase or Program operation is less than  
alternative flash memory technologies. The SST25VF512  
device operates with a single 2.7-3.6V power supply.  
The SST25VF512 device is offered in both 8-lead SOIC  
and 8-contact WSON packages. See Figure 1 for the pin  
assignments.  
The SST25VF512 device significantly improves perfor-  
mance, while lowering power consumption. The total  
energy consumed is a function of the applied voltage, cur-  
©2004 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71192-06-000  
1
4/04  
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