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SN74TVC3010PWLE PDF预览

SN74TVC3010PWLE

更新时间: 2024-09-13 13:13:51
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
11页 145K
描述
SPECIALTY LOGIC CIRCUIT, PDSO24, TSSOP-24

SN74TVC3010PWLE 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-24针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65Is Samacsys:N
系列:74JESD-30 代码:R-PDSO-G24
逻辑集成电路类型:LOGIC CIRCUIT功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
最大供电电压 (Vsup):5 V最小供电电压 (Vsup):
标称供电电压 (Vsup):3 V表面贴装:YES
技术:NMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子位置:DUAL
Base Number Matches:1

SN74TVC3010PWLE 数据手册

 浏览型号SN74TVC3010PWLE的Datasheet PDF文件第2页浏览型号SN74TVC3010PWLE的Datasheet PDF文件第3页浏览型号SN74TVC3010PWLE的Datasheet PDF文件第4页浏览型号SN74TVC3010PWLE的Datasheet PDF文件第5页浏览型号SN74TVC3010PWLE的Datasheet PDF文件第6页浏览型号SN74TVC3010PWLE的Datasheet PDF文件第7页 
SN74TVC3010  
10-BIT VOLTAGE CLAMP  
SCDS088A – APRIL 1999 – REVISED JUNE 1999  
DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
Designed to be Used in Voltage-Limiting  
Applications  
6.5-On-State Connection Between Ports  
A and B  
GND  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
1
2
3
4
5
6
7
8
9
24 GATE  
23 B1  
22 B2  
21 B3  
20 B4  
19 B5  
18 B6  
17 B7  
16 B8  
15 B9  
14 B10  
13 B11  
Flow-Through Pinout for Ease of Printed  
Circuit Board Trace Routing  
Direct Interface With GTL+ Levels  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DBQ), Thin Very Small-Outline (DGV), and  
Thin Shrink Small-Outline (PW) Packages  
A9 10  
A10 11  
A11 12  
description  
The SN74TVC3010 provides 11 parallel NMOS  
pass transistors with a common gate. The low  
on-state resistance of the switch allows  
connections to be made with minimal propagation  
delay.  
The device can be used as a 10-bit switch with the gates cascaded together to a reference transistor. The  
low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to  
protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application  
Information in this data sheet.)  
All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can  
be used as the reference transistor. Since, within the device, the characteristics from transistor-to-transistor are  
equal, the maximum output high-state voltage (V ) will be approximately the reference voltage (V  
), with  
OH  
REF  
minimum deviation from one output to another. This is a large benefit of the TVC solution over discrete devices.  
Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the  
low-voltage side, and the I/O signals are bidirectional through each FET.  
The SN74TVC3010 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
TI is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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