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SN74TVC3010PWRG4 PDF预览

SN74TVC3010PWRG4

更新时间: 2024-11-23 04:31:15
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德州仪器 - TI /
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19页 506K
描述
10-BIT VOLTAGE CLAMP

SN74TVC3010PWRG4 数据手册

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SN74TVC3010  
10-BIT VOLTAGE CLAMP  
SCDS088G – APRIL 1999 – REVISED AUGUST 2003  
DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
Designed to be Used in Voltage-Limiting  
Applications  
6.5-On-State Connection Between Ports  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
GND  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GATE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A and B  
2
3
Flow-Through Pinout for Ease of Printed  
Circuit Board Trace Routing  
4
5
Direct Interface With GTL+ Levels  
6
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 1000-V Charged-Device Model (C101)  
7
8
9
10  
11  
12  
A9  
A10  
A11  
B9  
B10  
B11  
description/ordering information  
The SN74TVC3010 provides 11 parallel NMOS  
pass transistors with a common gate. The low  
on-state resistance of the switch allows  
connections to be made with minimal propagation  
delay.  
The device can be used as a 10-bit switch with the gates cascaded together to a reference transistor. The  
low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to  
protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application  
Information in this data sheet.)  
All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can  
be used as the reference transistor. Since, within the device, the characteristics from transistor to transistor are  
equal, the maximum output high-state voltage (V ) is approximately the reference voltage (V  
), with  
OH  
REF  
minimal deviation from one output to another. This is a large benefit of the TVC solution over discrete devices.  
Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the  
low-voltage side, and the I/O signals are bidirectional through each FET.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube  
Tape and reel  
–40°C to 85°C SSOP (QSOP) – DBQ Tape and reel  
SN74TVC3010DW  
SN74TVC3010DWR  
SN74TVC3010DBQR  
SN74TVC3010PWR  
SN74TVC3010DGVR  
SOIC – DW  
TVC3010  
TVC3010  
TT010  
TSSOP – PW  
TVSOP – DGV  
Tape and reel  
Tape and reel  
TT010  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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