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SN74LVCH16543ADL PDF预览

SN74LVCH16543ADL

更新时间： 2024-11-05 23:06:23
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
11页 170K
描述
16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74LVCH16543ADL 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP-56针数：56
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.49
Is Samacsys：N其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：18.41 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.024 A湿度敏感等级：1
位数：8功能数量：2
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP56,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH包装方法：TUBE
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：0.02 mAProp。Delay @ Nom-Sup：5.4 ns
传播延迟（tpd）：6.1 ns认证状态：Not Qualified
施密特触发器：No座面最大高度：2.79 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：7.49 mm
Base Number Matches：1

SN74LVCH16543ADL 数据手册

 浏览型号SN74LVCH16543ADL的Datasheet PDF文件第2页浏览型号SN74LVCH16543ADL的Datasheet PDF文件第3页浏览型号SN74LVCH16543ADL的Datasheet PDF文件第4页浏览型号SN74LVCH16543ADL的Datasheet PDF文件第5页浏览型号SN74LVCH16543ADL的Datasheet PDF文件第6页浏览型号SN74LVCH16543ADL的Datasheet PDF文件第7页 
SN74LVCH16543A  
16-BIT REGISTERED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS317F – NOVEMBER 1993 – REVISED JUNE 1998  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OEAB  
1LEAB  
1CEAB  
GND  
1OEBA  
1LEBA  
1CEBA  
GND  
1B1  
1B2  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
3
= 3.3 V, T = 25°C  
CC  
A
4
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
1A1  
1A2  
5
= 3.3 V, T = 25°C  
A
6
Power Off Disables Outputs, Permitting  
Live Insertion  
V
V
7
CC  
CC  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
8
9
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
3.3-V V  
)
CC  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2A7  
2A8  
GND  
2CEAB  
2LEAB  
2OEAB  
2B7  
2B8  
GND  
2CEBA  
2LEBA  
2OEBA  
description  
This 16-bit registered transceiver is designed for  
1.65-V to 3.6-V V operation.  
CC  
The SN74LVCH16543A can be used as two 8-bit  
transceivers or one 16-bit transceiver. Separate  
latch-enable (LEAB or LEBA) and output-enable  
(OEAB or OEBA) inputs are provided for each  
register to permit independent control in either  
direction of data flow.  
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and  
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches  
in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data  
present at the output of the A latches. Data flow from B to A is similar, but requires using the CEBA, LEBA, and  
OEBA inputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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SN74LVCH16543ADL 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVCH16543ADLR TI

完全替代

 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVCH16543ADLG4 TI

完全替代

 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
74LVCH16543ADLRG4 TI

完全替代

 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

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