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SN74LVCH16952ADGGR

更新时间： 2024-09-16 11:08:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路触发器总线驱动器总线收发器
页数 文件大小 规格书
11页 169K
描述
具有三态输出的 16 位寄存收发器 | DGG | 56 | -40 to 85

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中文翻译

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SN74LVCH16952ADGGR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP56,.3,20针数：56
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.5
其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：14 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.02 mA
Prop。Delay @ Nom-Sup：6.6 ns传播延迟（tpd）：11 ns
认证状态：Not Qualified施密特触发器：No
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
触发器类型：POSITIVE EDGE宽度：6.1 mm
Base Number Matches：1

SN74LVCH16952ADGGR 数据手册

 浏览型号SN74LVCH16952ADGGR的Datasheet PDF文件第2页浏览型号SN74LVCH16952ADGGR的Datasheet PDF文件第3页浏览型号SN74LVCH16952ADGGR的Datasheet PDF文件第4页浏览型号SN74LVCH16952ADGGR的Datasheet PDF文件第5页浏览型号SN74LVCH16952ADGGR的Datasheet PDF文件第6页浏览型号SN74LVCH16952ADGGR的Datasheet PDF文件第7页 
SN74LVCH16952A  
16-BIT REGISTERED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS320F – NOVEMBER 1993 – REVISED JUNE 1998  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OEAB  
1CLKAB  
1CEAB  
GND  
1OEBA  
1CLKBA  
1CEBA  
GND  
1
2
3
4
5
6
7
8
9
56  
55  
54  
53  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
1A1  
1A2  
52 1B1  
51 1B2  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
V
50  
V
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
CC  
CC  
1A3  
1A4  
49 1B3  
48 1B4  
47 1B5  
46 GND  
45 1B6  
44 1B7  
43 1B8  
3.3-V V  
)
CC  
1A5 10  
GND 11  
1A6 12  
1A7 13  
1A8 14  
Power Off Disables Outputs, Permitting  
Live Insertion  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2A7  
2A8  
GND  
2B7  
2B8  
GND  
2CEBA  
2CLKBA  
2OEBA  
description  
2CEAB  
2CLKAB  
2OEAB  
This 16-bit registered transceiver is designed for  
1.65-V to 3.6-V V operation.  
CC  
The SN74LVCH16952A contains two sets of  
D-type flip-flops for temporary storage of data  
flowing in either direction. It can be used as two  
8-bit transceivers or one 16-bit transceiver. Data  
on the A or B bus is stored in the registers on the  
low-to-high transition of the clock (CLKAB or  
CLKBA) input, provided that the clock-enable  
(CEAB or CEBA) input is low. Taking the  
output-enable (OEAB or OEBA) input low  
accesses the data on either port.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74LVCH16952A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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SN74LVCH16952ADGGR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVCH16952ADLR TI

完全替代

 具有三态输出的 16 位寄存收发器 | DL | 56 | -40 to 85
SN74LVCH16952ADL TI

完全替代

 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

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 		具有三态输出的 16 位寄存收发器 | DGV | 56 | -40 to 85
SN74LVCH16952ADL TI

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 		16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVCH16952ADLG4 TI

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 		具有三态输出的 16 位寄存收发器 | DL | 56 | -40 to 85
SN74LVCH16952ADLRG4 TI

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 		LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, PLASTIC, SSOP-56
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 		16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
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 		16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
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SN74LVCH16T245DGGR TI

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 		16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
SN74LVCH16T245DGVR TI

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 		16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU

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