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SN74LVCH16652ADLG4

更新时间： 2024-11-28 11:07:03
品牌 Logo 应用领域
德州仪器 - TI 驱动总线驱动器总线收发器
页数 文件大小 规格书
12页 190K
描述
具有三态输出的 16 位总线收发器和寄存器 | DL | 56 | -40 to 125

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SN74LVCH16652ADLG4 数据手册

 浏览型号SN74LVCH16652ADLG4的Datasheet PDF文件第2页浏览型号SN74LVCH16652ADLG4的Datasheet PDF文件第3页浏览型号SN74LVCH16652ADLG4的Datasheet PDF文件第4页浏览型号SN74LVCH16652ADLG4的Datasheet PDF文件第5页浏览型号SN74LVCH16652ADLG4的Datasheet PDF文件第6页浏览型号SN74LVCH16652ADLG4的Datasheet PDF文件第7页 
SN74LVCH16652A  
16-BIT BUS TRANSCEIVER AND REGISTER  
WITH 3-STATE OUTPUTS  
SCAS319G – NOVEMBER 1993 – REVISED JUNE 1998  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OEAB  
1CLKAB  
1SAB  
GND  
1OEBA  
1CLKBA  
1SBA  
GND  
1B1  
1B2  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
2
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
3
= 3.3 V, T = 25°C  
CC  
A
4
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
1A1  
1A2  
5
= 3.3 V, T = 25°C  
A
6
Power Off Disables Outputs, Permitting  
Live Insertion  
V
V
7
CC  
CC  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
8
9
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
3.3-V V  
)
CC  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2A7 23  
2A8 24  
34 2B7  
33 2B8  
description  
GND 25  
32 GND  
31 2SBA  
30 2CLKBA  
29 2OEBA  
2SAB 26  
2CLKAB 27  
2OEAB 28  
This 16-bit bus transceiver and register is  
designed for 1.65-V to 3.6-V V operation.  
CC  
The SN74LVCH16652A consists of D-type  
flip-flops and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
The device can be used as two 8-bit transceivers  
or one 16-bit transceiver.  
Complementary output-enable (OEAB and OEBA) inputs control the transceiver functions. Select-control (SAB  
and SBA) inputs select whether real-time or stored data is transferred. A low input level selects real-time data,  
and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding  
glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates  
the four fundamental bus-management functions that can be performed with the SN74LVCH16652A.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

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SN74LVCH16652ADLG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVCH16652ADGVR TI

完全替代

 具有三态输出的 16 位总线收发器和寄存器 | DGV | 56 | -40 to 125
SN74LVCH16652ADGGR TI

完全替代

 暂无描述

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 		16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
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