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SN74LVC2952APWT PDF预览

SN74LVC2952APWT

更新时间: 2024-11-20 05:24:47
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
14页 287K
描述
OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

SN74LVC2952APWT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.53
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:7.8 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:8.2 ns传播延迟(tpd):8.8 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:4.4 mm

SN74LVC2952APWT 数据手册

 浏览型号SN74LVC2952APWT的Datasheet PDF文件第2页浏览型号SN74LVC2952APWT的Datasheet PDF文件第3页浏览型号SN74LVC2952APWT的Datasheet PDF文件第4页浏览型号SN74LVC2952APWT的Datasheet PDF文件第5页浏览型号SN74LVC2952APWT的Datasheet PDF文件第6页浏览型号SN74LVC2952APWT的Datasheet PDF文件第7页 
SN74LVC2952A  
OCTAL BUS TRANSCEIVER AND REGISTER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS311IJANUARY 1993REVISED MARCH 2005  
FEATURES  
DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 8.2 ns at 3.3 V  
B8  
B7  
B6  
B5  
B4  
V
CC  
1
2
3
4
5
6
7
8
9
10  
24  
23 A8  
22 A7  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
A6  
A5  
21  
20  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
B3  
B2  
B1  
19 A4  
18 A3  
17 A2  
16 A1  
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With  
3.3-V VCC  
)
OEAB  
CLKAB  
15  
OEBA  
Ioff Supports Partial-Power-Down Mode  
Operation  
CLKENAB 11  
GND 12  
14 CLKBA  
13 CLKENBA  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVC2952A consists of two 8-bit back-to-back registers that store data flowing in both directions  
between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of  
the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking  
the output-enable (OEAB or OEBA) input low accesses the data on either port.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC2952ADW  
TOP-SIDE MARKING  
LVC2952A  
Tube of 25  
SOIC – DW  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 60  
SN74LVC2952ADWR  
SN74LVC2952ANSR  
SN74LVC2952ADBR  
SN74LVC2952APW  
SOP – NS  
LVC2952A  
LE952A  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
Reel of 2000  
Reel of 250  
SN74LVC2952APWR  
SN74LVC2952APWT  
LE952A  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LVC2952APWT 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC2952APWTE4 TI

完全替代

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
SN74LVC2952APWRE4 TI

完全替代

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
SN74LVC2952ADBR TI

类似代替

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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2 通道、2 输入、1.65V 至 5.5V 与非门 | DCT | 8 | -40 to