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SN74LVC2G00YZPR

更新时间： 2024-02-26 19:31:32

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
13页	341K
描述
DUAL 2 INPUT POSITIVE NAND GATE

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数据手册
替代型号

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SN74LVC2G00YZPR 数据手册

SN74LVC2G00

DUAL 2-INPUT POSITIVE-NAND GATE

www.ti.com

SCES193J–APRIL 1999–REVISED JULY 2005

FEATURES

DCT OR DCU PACKAGE

(TOP VIEW)

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

Supports 5-V V_CCOperation

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.3 ns at 3.3 V

GND

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

YEA, YEP, YZA OR YZP PACKAGE

(BOTTOM VIEW)

Typical V_OLP(Output Ground Bounce)

<0.8 V at V_CC= 3.3 V, T_A= 25°C

GND

•

Typical V_OHV(Output V_OHUndershoot)

>2 V at V_CC= 3.3 V, T_A= 25°C

I_offSupports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This dual 2-input positive-NAND gate is designed for 1.65-V to 5.5-V V_CCoperation.

The SN74LVC2G00 performs the Boolean function Y = A B or Y = A + B in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.17-mm Small Bump – YEA

SN74LVC2G00YEAR

NanoFree™ – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free)

SN74LVC2G00YZAR

_ _ _CA_

Reel of 3000

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

SN74LVC2G00YEPR

–40°C to 85°C

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SN74LVC2G00YZPR

SSOP – DCT

Reel of 3000

Reel of 250

SN74LVC2G00DCTR

SN74LVC2G00DCUR

SN74LVC2G00DCUT

C00_ _ _

C00_

VSSOP – DCU

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...13

中文翻译

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SN74LVC2G00YZPR 替代型号

型号	品牌	替代类型	描述	数据表
SN74LVC2G00YEPR	TI	完全替代	DUAL 2 INPUT POSITIVE NAND GATE

与SN74LVC2G00YZPR相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC2G02	TI	获取价格	DUAL 2 INPUT POSITIVE NOR GATE
SN74LVC2G02DCTR	TI	获取价格	DUAL 2 INPUT POSITIVE NOR GATE
SN74LVC2G02DCTR	ROCHESTER	获取价格	LVC/LCX/Z SERIES, DUAL 2-INPUT NOR GATE, PDSO8, GREEN, PLASTIC, SSOP-8
SN74LVC2G02DCTRE4	TI	获取价格	DUAL 2-INPUT POSITIVE-NOR GATE
SN74LVC2G02DCTRG4	TI	获取价格	DUAL 2-INPUT POSITIVE-NOR GATE
SN74LVC2G02DCUR	TI	获取价格	DUAL 2 INPUT POSITIVE NOR GATE
SN74LVC2G02DCUR	ROCHESTER	获取价格	LVC/LCX/Z SERIES, DUAL 2-INPUT NOR GATE, PDSO8, GREEN, PLASTIC, VSSOP-8
SN74LVC2G02DCURE4	TI	获取价格	DUAL 2-INPUT POSITIVE-NOR GATE
SN74LVC2G02DCUT	ROCHESTER	获取价格	LVC/LCX/Z SERIES, DUAL 2-INPUT NOR GATE, PDSO8, GREEN, PLASTIC, VSSOP-8
SN74LVC2G02DCUT	TI	获取价格	DUAL 2 INPUT POSITIVE NOR GATE

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