5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 触发器/锁存器> SN74LVC1G74DCTRE6
SN74LVC1G74DCTRE6 PDF预览

SN74LVC1G74DCTRE6

更新时间： 2024-11-04 12:47:03
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
19页 720K
描述
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

阅读下载

中文翻译

获取价格

SN74LVC1G74DCTRE6 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：PLASTIC, SSOP-8
针数：8Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.22
Is Samacsys：N系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G8长度：2.95 mm
逻辑集成电路类型：D FLIP-FLOP最大频率@ Nom-Sup：175000000 Hz
最大I（ol）：0.024 A位数：1
功能数量：1端子数量：8
最高工作温度：125 °C最低工作温度：-40 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：LSSOP封装等效代码：SSOP8,.16
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 VProp。Delay @ Nom-Sup：7.9 ns
传播延迟（tpd）：14.4 ns认证状态：Not Qualified
座面最大高度：1.3 mm子类别：FF/Latch
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：2.8 mm
最小 fmax：200 MHzBase Number Matches：1

SN74LVC1G74DCTRE6 数据手册

 浏览型号SN74LVC1G74DCTRE6的Datasheet PDF文件第2页浏览型号SN74LVC1G74DCTRE6的Datasheet PDF文件第3页浏览型号SN74LVC1G74DCTRE6的Datasheet PDF文件第4页浏览型号SN74LVC1G74DCTRE6的Datasheet PDF文件第5页浏览型号SN74LVC1G74DCTRE6的Datasheet PDF文件第6页浏览型号SN74LVC1G74DCTRE6的Datasheet PDF文件第7页 
SN74LVC1G74  
www.ti.com  
SCES794B –SEPTEMBER 2009–REVISED FEBRUARY 2012  
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH CLEAR AND PRESET  
Check for Samples: SN74LVC1G74  
1
FEATURES  
2
•
Available in the Texas Instruments NanoFree™  
Package  
•
•
•
Ioff Supports Live Insertion, Partial Power  
Down Mode, and Back Drive Protection  
•
•
•
•
•
•
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.9 ns at 3.3 V  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Low Power Consumption, 10-μA Max ICC  
±24-mA Output Drive at 3.3 V  
1000-V Charged-Device Model (C101)  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
DCT PACKAGE  
(TOP VIEW)  
DCU PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(TOP VIEW)  
A1  
B1  
C1  
D1  
A2  
B2  
C2  
D2  
1 8  
2 7  
3 6  
4 5  
VCC  
PRE  
CLR  
Q
VCC  
1
2
3
4
8
7
6
5
CLK  
D
CLK  
D
Q
GND  
VCC  
1
2
3
4
8
7
6
5
CLK  
D
PRE  
CLR  
Q
PRE  
CLR  
Q
Q
GND  
Q
GND  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the  
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time  
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs  
at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,  
data at the D input can be changed without affecting the levels at the outputs.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2012, Texas Instruments Incorporated  
 
1234567...19

中文翻译

下载PDF

与SN74LVC1G74DCTRE6相关器件

型号 品牌 获取价格 描述 数据表
SN74LVC1G74DCTR-P TI

获取价格

 		暂无描述
SN74LVC1G74DCU TI

获取价格

 		SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC1G74DCU6 TI

获取价格

 		SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC1G74DCUR TI

获取价格

 		SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC1G74DCURG4 TI

获取价格

 		SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC1G74DCUR-P TI

获取价格

 		LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, PLASTI
SN74LVC1G74DCUT TI

获取价格

 		SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC1G74DQER TI

获取价格

 		Available in the Texas Instruments NanoFreeâ„
SN74LVC1G74RSE2 TI

获取价格

 		具有清零和预置端的单路正边沿触发式 D 型触发器 | RSE | 8 | -40 to 1
SN74LVC1G74RSER TI

获取价格

 		具有清零和预置端的单路正边沿触发式 D 型触发器 | RSE | 8 | -40 to 1

与SN74LVC1G74DCTRE6相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证