Datasheet > SN74LVC1G125_10

SN74LVC1G125_10

更新时间： 2024-11-20 11:52:07

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
19页	737K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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SN74LVC1G125_10 数据手册

SN74LVC1G125

SINGLE BUS BUFFER GATE

WITH 3-STATE OUTPUT

www.ti.com

SCES223O–APRIL 1999–REVISED FEBRUARY 2007

FEATURES

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

I_offSupports Partial-Power-Down Mode

Operation

•

Supports 5-V V_CCOperation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Inputs Accept Voltages to 5.5 V

Max t_pdof 3.7 ns at 3.3 V

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

200-V Machine Model (A115-A)

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

1000-V Charged-Device Model (C101)

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

DRL PACKAGE

(TOP VIEW)

V_CC

GND

YZP PACKAGE

(BOTTOM VIEW)

DRY PACKAGE

(TOP VIEW)

GND

V_CC

GND

NC – No internal connection

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

This bus buffer gate is designed for 1.65-V to 5.5-V V_CCoperation.

The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable

(OE) input is high.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CCthrough a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...19

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与SN74LVC1G125_10相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC1G125_101	TI	获取价格	SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G125DBV	TI	获取价格	SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC1G125DBVR	TI	获取价格	SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G125DBVR	UMW	获取价格	逻辑集成电路
SN74LVC1G125DBVRE4	TI	获取价格	IC IC,BUFFER/DRIVER,SINGLE,1-BIT,LCX/LVC-CMOS,TSOP,5PIN,PLASTIC, Bus Driver/Transceiver
SN74LVC1G125DBVT	TI	获取价格	SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G125DBVTE4	TI	获取价格	IC,BUFFER/DRIVER,SINGLE,1-BIT,LCX/LVC-CMOS,TSOP,5PIN,PLASTIC
SN74LVC1G125DCK	TI	获取价格	SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC1G125DCK3	TI	获取价格	具有三态输出的 1.65V 至 5.5V 单路缓冲器 \| DCK \| 5 \| -40 to
SN74LVC1G125DCKJ	TI	获取价格	具有三态输出的 1.65V 至 5.5V 单路缓冲器 \| DCK \| 5 \| -40 to

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