5秒后页面跳转
SN74LVC1G125DBV PDF预览

SN74LVC1G125DBV

更新时间: 2024-11-19 23:11:03
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
8页 122K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

SN74LVC1G125DBV 数据手册

 浏览型号SN74LVC1G125DBV的Datasheet PDF文件第2页浏览型号SN74LVC1G125DBV的Datasheet PDF文件第3页浏览型号SN74LVC1G125DBV的Datasheet PDF文件第4页浏览型号SN74LVC1G125DBV的Datasheet PDF文件第5页浏览型号SN74LVC1G125DBV的Datasheet PDF文件第6页浏览型号SN74LVC1G125DBV的Datasheet PDF文件第7页 
SN74LVC1G125  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
SCES223C – APRIL 1999 – REVISED FEBRUARY 2000  
DBV OR DCK PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
I
Feature Supports Partial-Power-Down  
off  
OE  
A
GND  
V
Y
1
2
3
5
4
CC  
Mode Operation  
Supports 5-V V  
Operation  
CC  
Package Options Include Plastic  
Small-Outline Transistor (DBV, DCK)  
Packages  
description  
This bus buffer gate is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC1G125 features a single line driver with a 3-state output. The output is disabled when the  
output-enable (OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
The SN74LVC1G125 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
logic symbol  
1
2
OE  
A
EN  
4
Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与SN74LVC1G125DBV相关器件

型号 品牌 获取价格 描述 数据表
SN74LVC1G125DBVR TI

获取价格

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G125DBVR UMW

获取价格

逻辑集成电路
SN74LVC1G125DBVRE4 TI

获取价格

IC IC,BUFFER/DRIVER,SINGLE,1-BIT,LCX/LVC-CMOS,TSOP,5PIN,PLASTIC, Bus Driver/Transceiver
SN74LVC1G125DBVT TI

获取价格

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G125DBVTE4 TI

获取价格

IC,BUFFER/DRIVER,SINGLE,1-BIT,LCX/LVC-CMOS,TSOP,5PIN,PLASTIC
SN74LVC1G125DCK TI

获取价格

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC1G125DCK3 TI

获取价格

具有三态输出的 1.65V 至 5.5V 单路缓冲器 | DCK | 5 | -40 to
SN74LVC1G125DCKJ TI

获取价格

具有三态输出的 1.65V 至 5.5V 单路缓冲器 | DCK | 5 | -40 to
SN74LVC1G125DCKR TI

获取价格

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G125DCKR UMW

获取价格

逻辑集成电路