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SN74FB2033K_07 PDF预览

SN74FB2033K_07

更新时间: 2024-09-15 04:01:03
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
14页 208K
描述
8-BIT TTL/BTL REGISTERED TRANSCEIVER

SN74FB2033K_07 数据手册

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SN74FB2033K  
8-BIT TTL/BTL REGISTERED TRANSCEIVER  
SCBS472G – MAY 1994 – REVISED SEPTEMBER 2001  
Compatible With IEEE Std 1194.1-1991  
(BTL)  
High-Impedance State During Power Up  
and Power Down  
TTL A Port, Backplane Transceiver Logic  
(BTL) B Port  
B-Port Biasing Network Preconditions the  
Connector and PC Trace to the BTL  
High-Level Voltage  
Open-Collector B-Port Outputs Sink  
100 mA  
TTL-Input Structures Incorporate Active  
Clamping Networks to Aid in Line  
Termination  
BIAS V  
Pin Minimizes Signal Distortion  
CC  
During Live Insertion/Withdrawal  
RC PACKAGE  
(TOP VIEW)  
52 51 50 49 48 47 46 45 44 43 42 41 40  
1
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
GND  
AO2  
AI3  
AO3  
AI4  
GND  
B2  
2
3
GND  
B3  
GND  
B4  
GND  
B5  
GND  
B6  
4
5
6
AO4  
LOOPBACK  
AI5  
7
8
9
AO5  
AI6  
AO6  
AI7  
10  
11  
12  
13  
GND  
B7  
GND  
GND  
14 15 16 17 18 19 20 21 22 23 24 25 26  
description  
TheSN74FB2033Kisan8-bittransceiverfeaturingasplitinput(AI)andoutput(AO)busontheTTL-levelA port.  
The common I/O, open-collector B port operates at backplane transceiver logic (BTL) signal levels. The  
SN74FB2033K is specifically designed to be compatible with IEEE Std 1194.1-1991.  
The logic element for data flow in each direction is configured by two mode inputs (IMODE1 and IMODE0 for  
B-to-A, OMODE1 and OMODE0 for A-to-B) as a buffer, a D-type flip-flop, or a D-type latch. When configured  
in the buffer mode, the inverted input data appears at the output port. In the flip-flop mode, data is stored on  
the rising edge of the appropriate clock input (CLKAB/LEAB or CLKBA/LEBA). In the latch mode, the clock  
inputs serve as active-high transparent latch enables.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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