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SN74GTL1655 PDF预览

SN74GTL1655

更新时间： 2024-09-14 22:16:03
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德州仪器 - TI /
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16页 267K
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16-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION

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SN74GTL1655 数据手册

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SN54GTL1655, SN74GTL1655  
16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS  
WITH LIVE INSERTION  
SCBS696E – JULY 1997 – REVISED NOVEMBER 1999  
SN74GTL1655 . . . DGG PACKAGE  
Members of the Texas Instruments  
Widebus Family  
(TOP VIEW)  
UBT (Universal Bus Transceiver)  
Combines D-Type Latches and D-Type  
Flip-Flops for Operation in Transparent,  
Latched, or Clocked Mode  
1
64  
63  
62  
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38  
37  
36  
35  
34  
33  
1OEAB  
1OEBA  
CLK  
1LEAB  
1LEBA  
2
3
V
CC  
4
1A1  
GND  
1A2  
1A3  
GND  
1A4  
GND  
1A5  
GND  
1A6  
V
ERC  
Translate Between GTL/GTL+ Signal Level  
and LVTTL Logic Levels  
5
GND  
1B1  
1B2  
GND  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
6
High-Drive (100 mA),  
Low-Output-Impedance (12 Ω) Bus  
Transceiver (B Port)  
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
Edge-Rate-Control Input Configures the  
B-Port Output Rise and Fall Times  
I
, Power-Up 3-State, and BIAS V  
CC  
off  
Support Live Insertion  
1A7  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors on A Port  
V
V
CC  
CC  
1A8  
2A1  
GND  
2A2  
2A3  
GND  
2A4  
2A5  
GND  
2A6  
GND  
2A7  
1B8  
2B1  
GND  
2B2  
2B3  
GND  
2B4  
2B5  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND-Pin Configuration  
CC  
Package Options Include Thin Shrink  
Small-Outline (DGG) and Ceramic Quad  
Flat (HV) Packages  
description  
V
REF  
2B6  
GND  
2B7  
The ’GTL1655 devices are high-drive (100 mA),  
low-output-impedance (12 Ω) 16-bit universal bus  
transceivers (UBT) that provide LVTTL-to-  
GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level  
translation. They are partitioned as two 8-bit  
transceivers and combine D-type flip-flops and  
D-type latches to allow for transparent, latched,  
and clocked modes of data transfer similar to the  
’16501 function. These devices provide an  
interface between cards operating at LVTTL logic  
levels and a backplane operating at GTL/GTL+  
signal levels. Higher-speed operation is a direct  
result of the reduced output swing (<1 V), reduced  
input threshold levels and output edge control  
(OEC ). The high drive is suitable for driving  
double-terminated low-impedance backplanes  
using incident-wave switching.  
V
2B8  
CC  
2A8  
GND  
2OEAB  
2OEBA  
BIAS V  
2LEAB  
2LEBA  
OE  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, UBT, and OEC are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...16

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