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SN74AVC16244DGV

更新时间： 2024-11-15 22:59:15
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路电视光电二极管输出元件
页数 文件大小 规格书
11页 259K
描述
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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中文翻译

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SN74AVC16244DGV 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：TVSOP-48针数：48
Reach Compliance Code：unknown风险等级：5.61
Is Samacsys：N系列：AVC
JESD-30 代码：R-PDSO-G48长度：9.7 mm
逻辑集成电路类型：BUS DRIVER位数：4
功能数量：4端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟（tpd）：3.3 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.4 V
标称供电电压 (Vsup)：1.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.4 mm
端子位置：DUAL宽度：4.4 mm
Base Number Matches：1

SN74AVC16244DGV 数据手册

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SCES141N − JULY 1998 − REVISED JULY 2004  
D
D
Member of the Texas Instruments  
WidebusFamily  
DOC(Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without  
Speed Degradation  
D
D
D
D
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
I
Supports Partial-Power-Down Mode  
off  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
Less Than 2-ns Maximum Propagation  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Delay at 2.5-V and 3.3-V V  
CC  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I and I of  
OH  
OL  
24 mA at 2.5-V V  
CC  
description/ordering information  
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1  
shows typical V vs I and V  
vs I  
curves to illustrate the output impedance and drive capability of the  
OL  
OL  
OH  
OH  
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is  
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC  
Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC)  
Circuitry Technology and Applications, literature number SCEA009.  
3.2  
T
= 25°C  
T
= 25°C  
A
A
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
= 3.3 V  
CC  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
= 2.5 V  
CC  
V
= 1.8 V  
CC  
V
= 3.3 V  
V
= 2.5 V  
CC  
CC  
V
= 1.8 V  
CC  
−160 −144 −128 −112 −96 −80 −64 −48 −32 −16  
− Output Current − mA  
0
17  
34  
51  
68  
85 102 119 136 153 170  
0
I
− Output Current − mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
†
T
PACKAGE  
A
MARKING  
AVC16244  
CVA244  
TSSOP − DGG  
Tape and reel SN74AVC16244DGGR  
Tape and reel SN74AVC16244DGVR  
TVSOP − DGV  
−40°C to 85°C  
VFBGA − GQL  
SN74AVC16244GQLR  
Tape and reel  
CVA244  
VFBGA − ZQL (Pb-free)  
SN74AVC16244ZQLR  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC and Widebus are trademarks of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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