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SN74AVC16373DGGR

更新时间： 2024-09-30 11:07:07
品牌 Logo 应用领域
德州仪器 - TI 驱动锁存器总线驱动器总线收发器
页数 文件大小 规格书
11页 169K
描述
具有三态输出的 16 位透明 D 型锁存器 | DGG | 48 | -40 to 85

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SN74AVC16373DGGR 数据手册

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SN74AVC16373  
16-BIT TRANSPARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
SCES156F – DECEMBER 1998 – REVISED FEBRUARY 2000  
Member of the Texas Instruments  
Widebus Family  
I
Supports Partial-Power-Down Mode  
off  
Operation  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
DOC (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without  
Speed Degradation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Package Options Include Plastic Thin  
Shrink Small-Outline (DGG) and Thin Very  
Small-Outline (DGV) Packages  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I  
and I  
of  
OH  
OL  
±24 mA at 2.5-V V  
CC  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
description  
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1  
shows typical V vs I and V  
vs I  
curves to illustrate the output impedance and drive capability of the  
OL  
OL  
OH  
OH  
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is  
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC  
Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC )  
Circuitry Technology and Applications, literature number SCEA009.  
3.2  
T
= 25°C  
T
= 25°C  
A
A
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
= 3.3 V  
CC  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
= 2.5 V  
CC  
V
= 1.8 V  
CC  
V
= 3.3 V  
V
= 2.5 V  
CC  
CC  
V
= 1.8 V  
CC  
–160 –144 –128 –112 –96 –80 –64 –48 –32 –16  
– Output Current – mA  
0
17  
34  
51  
68  
85 102 119 136 153 170  
0
I
– Output Current – mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 16-bit transparent D-type latch is operational at 1.2-V to 3.6-V V , but is designed specifically for 1.65-V  
CC  
to 3.6-V V  
operation.  
CC  
The SN74AVC16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the  
latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs  
are latched at the levels set up at the D inputs.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC, EPIC, and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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SN74AVC16373DGGR 替代型号

型号 品牌 替代类型 描述 数据表
74AVC16373DGGRG4 TI

完全替代

 16-Bit Transparent D-Type Latch With 3-State Outputs 48-TSSOP -40 to 85
SN74AVC16373DGG TI

完全替代

 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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