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SN74AVC16245DGVR PDF预览

SN74AVC16245DGVR

更新时间： 2024-09-29 12:02:39
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
16页 370K
描述
16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74AVC16245DGVR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：TSSOP, TSSOP48,.25,16针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.34其他特性：WITH DIRECTION CONTROL
控制类型：COMMON CONTROL计数方向：BIDIRECTIONAL
系列：AVCJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：9.7 mm
负载电容（CL）：30 pF逻辑集成电路类型：BUS TRANSCEIVER
最大I（ol）：0.012 A湿度敏感等级：1
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.25,16封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：0.04 mAProp。Delay @ Nom-Sup：1.7 ns
传播延迟（tpd）：4 ns认证状态：Not Qualified
施密特触发器：No座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.2 V标称供电电压 (Vsup)：1.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.4 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：4.4 mm
Base Number Matches：1

SN74AVC16245DGVR 数据手册

 浏览型号SN74AVC16245DGVR的Datasheet PDF文件第2页浏览型号SN74AVC16245DGVR的Datasheet PDF文件第3页浏览型号SN74AVC16245DGVR的Datasheet PDF文件第4页浏览型号SN74AVC16245DGVR的Datasheet PDF文件第5页浏览型号SN74AVC16245DGVR的Datasheet PDF文件第6页浏览型号SN74AVC16245DGVR的Datasheet PDF文件第7页 
SN74AVC16245  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES142L–JULY 1998–REVISED MAY 2005  
FEATURES  
•
•
•
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
•
•
•
Member of the Texas Instruments Widebus™  
Family  
Ioff Supports Partial-Power-Down Mode  
Operation  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
DOC™ (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without Speed  
Degradation  
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 78  
•
•
Less Than 2-ns Maximum Propagation Delay  
at 2.5-V and 3.3-V VCC  
Package Options Include Plastic Thin Shrink  
Small-Outline (DGG) and Thin Very  
Small-Outline (DGV) Packages  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA  
at 2.5-V VCC  
DESCRIPTION  
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows  
typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At  
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a  
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family  
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry  
Technology and Applications, literature number SCEA009.  
3.2  
T
A
= 25°C  
T
A
= 25°C  
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
CC  
= 3.3 V  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
V
CC  
= 3.3 V  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
0
17  
34  
51  
68  
85 102 119 136 153 170  
-160 -144 -128 -112 -96 -80 -64 -48 -32 -16  
- Output Current - mA  
0
I
- Output Current - mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 16-bit (dual octal) noninverting bus transceiver is operational at 1.2-V to 3.6-V VCC, but is designed  
specifically for 1.65-V to 3.6-V VCC operation.  
The SN74AVC16245 is designed for asynchronous communication between data buses. The control-function  
implementation minimizes external timing requirements.  
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the  
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)  
input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC, DOC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...16

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SN74AVC16245DGVR 替代型号

型号 品牌 替代类型 描述 数据表
74AVC16245DGVRG4 TI

完全替代

 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74AVC16245DGVRE4 TI

完全替代

 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74AVC16245DGG TI

类似代替

 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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