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SN74AVC16269DGGR PDF预览

SN74AVC16269DGGR

更新时间： 2024-11-17 02:58:43
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
17页 501K
描述
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

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SN74AVC16269DGGR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP56,.3,20针数：56
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：8.61
Is Samacsys：N其他特性：WITH SYNCHRONOUS O/P ENABLES AND MUX SELECT
系列：AVCJESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：14 mm
逻辑集成电路类型：BUS EXCHANGER湿度敏感等级：1
位数：12功能数量：1
端口数量：3端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：3.3 V传播延迟（tpd）：9.5 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Other Logic ICs最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.4 V标称供电电压 (Vsup)：1.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

SN74AVC16269DGGR 数据手册

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SN74AVC16269  
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES152G–DECEMBER 1998–REVISED MAY 2005  
FEATURES  
•
•
•
•
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
•
•
•
Member of the Texas Instruments Widebus™  
Family  
Ioff Supports Partial-Power-Down Mode  
Operation  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
DOC™ (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without Speed  
Degradation  
Package Options Include Plastic Thin Shrink  
Small-Outline (DGG) and Thin Very  
Small-Outline (DGV) Packages  
•
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA  
at 2.5-V VCC  
DESCRIPTION  
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows  
typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At  
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a  
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family  
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry  
Technology and Applications, literature number SCEA009.  
3.2  
T
A
= 25°C  
T
A
= 25°C  
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
CC  
= 3.3 V  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
V
CC  
= 3.3 V  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
0
17  
34  
51  
68  
85 102 119 136 153 170  
-160 -144 -128 -112 -96 -80 -64 -48 -32 -16  
- Output Current - mA  
0
I
- Output Current - mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 12-bit to 24-bit registered bus exchanger is operational at 1.2-V to 3.6-V VCC, but is designed specifically for  
1.65-V to 3.6-V VCC operation.  
The SN74AVC16269 is used in applications in which two separate ports must be multiplexed onto, or  
demultiplexed from, a single port. The device is particularly suitable as an interface between synchronous  
DRAMs and high-speed microprocessors.  
Data is stored in the internal B-port registers on the low-to-high transition of the clock (CLK) input when the  
appropriate clock-enable (CLKENA) inputs are low. Proper control of these inputs allows two sequential 12-bit  
words to be presented as a 24-bit word on the B port. For data transfer in the B-to-A direction, a single storage  
register is provided. The select (SEL) line selects 1B or 2B data for the A outputs. The register on the A output  
permits the fastest possible data transfer, thus extending the period during which the data is valid on the bus.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC, DOC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 
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