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SN74AVC16244DGGE4

更新时间： 2024-11-16 14:31:11
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
15页 341K
描述
AVC SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, TSSOP-48

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SN74AVC16244DGGE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP,针数：48
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.24系列：AVC
JESD-30 代码：R-PDSO-G48JESD-609代码：e4
长度：12.5 mm逻辑集成电路类型：BUS DRIVER
湿度敏感等级：1位数：4
功能数量：4端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
传播延迟（tpd）：3.3 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.4 V标称供电电压 (Vsup)：1.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

SN74AVC16244DGGE4 数据手册

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SCES588B – AUGUST 2004 − REVISED MARCH 2005  
D
D
Control Inputs V /V Levels Are  
D
D
I/Os Are 4.6-V Tolerant  
IH IL  
Referenced to V  
Voltage  
CCA  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
Isolation Feature − If Either V  
Input  
CC  
CC  
Is at GND, All Outputs Are in the  
High-Impedance State  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
ESD Protection Exceeds JESD 22  
− 8000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.2-V to  
3.6-V Power-Supply Range  
− 1000-V Charged-Device Model (C101)  
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
description/ordering information  
This 24-bit noninverting bus transceiver uses two separate configurable power-supply rails. The  
SN74AVCH24T245 is optimized to operate with V  
as low as 1.2 V. The A port is designed to track V  
/V  
set at 1.4 V to 3.6 V. It is operational with V  
accepts any supply voltage from 1.2 V to 3.6 V. The  
/V  
CCA CCB  
CCA CCB  
. V  
CCA CCA  
B port is designed to track V  
. V  
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal  
CCB CCB  
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCH24T245 is designed for asynchronous communication between data buses. The device  
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCH24T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1OE, 2OE,  
3OE, 4OE, 5OE, and 6OE) are supplied by V  
.
CCA  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
The V  
state.  
isolation feature ensures that if either V  
input is at GND, then both ports are in the high-impedance  
CC  
CC  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CCA  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
LFBGA − GRG  
LFBGA − ZRG (Pb-free)  
74AVCH24T245GRGR  
74AVCH24T245ZRGR  
−40°C to 85°C  
Tape and reel  
WL245  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2005, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

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