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SN74AUP1G08DBVRG4 PDF预览

SN74AUP1G08DBVRG4

更新时间： 2024-11-02 05:24:51
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德州仪器 - TI 输入元件
页数 文件大小 规格书
17页 568K
描述
LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE

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SN74AUP1G08DBVRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOT-23
包装说明：LSSOP, TSOP5/6,.11,37针数：5
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.38
系列：AUP/ULP/VJESD-30 代码：R-PDSO-G5
JESD-609代码：e4长度：2.9 mm
负载电容（CL）：30 pF逻辑集成电路类型：AND GATE
最大I（ol）：0.0017 A湿度敏感等级：1
功能数量：1输入次数：2
端子数量：5最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：LSSOP
封装等效代码：TSOP5/6,.11,37封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：1.2/3.3 V
Prop。Delay @ Nom-Sup：25.5 ns传播延迟（tpd）：25.5 ns
认证状态：Not Qualified施密特触发器：NO
座面最大高度：1.45 mm子类别：Gates
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.95 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：1.6 mm

SN74AUP1G08DBVRG4 数据手册

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SN74AUP1G08  
LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE  
www.ti.com  
SCES502G–NOVEMBER 2003–REVISED OCTOBER 2007  
1
FEATURES  
2
•
Available in the Texas Instruments NanoFree™  
Package  
•
•
Optimized for 3.3-V Operation  
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
•
•
Low Static-Power Consumption (ICC = 0.9 μA  
Maximum)  
•
•
•
tpd = 4.3 ns Maximum at 3.3 V  
Low Dynamic-Power Consumption  
(Cpd = 4.3 pF Typ at 3.3 V)  
Suitable for Point-to-Point Applications  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
Low Input Capacitance (Ci = 1.5 pF Typical)  
Low Noise – Overshoot and Undershoot  
<10% of VCC  
•
ESD Performance Tested Per JESD 22  
–
2000-V Human-Body Model  
(A114-B, Class II)  
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
–
200-V Machine Model (A115-A)  
Schmitt-Trigger Action Allows Slow Input  
Transition and Better Switching Noise  
Immunity at the Input (Vhys = 250 mV Typical at  
3.3 V)  
1000-V Charged-Device Model (C101)  
•
ESD Protection Exceeds ±5000 V With  
Human-Body Model  
•
Wide Operating VCC Range of 0.8 V to 3.6 V  
YZP PACKAGE  
(BOTTOM VIEW)  
YFP PACKAGE  
(BOTTOM VIEW)  
DRY PACKAGE  
(TOP VIEW)  
1
2
3
6
5
A
B
VCC  
NC  
Y
NC  
6
4
GND  
DESCRIPTION/ORDERING INFORMATION  
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable  
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range  
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal  
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).  
Y + A • B or Y + A ) B  
This single 2-input positive-AND gate performs the Boolean function  
in positive logic.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoFree is a trademark of Texas Instruments.  
UNLESS OTHERWISE NOTED this document contains  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2007, Texas Instruments Incorporated  
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SN74AUP1G08DBVRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUP1G08DBVTG4 TI

完全替代

 LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1G08DBVTE4 TI

完全替代

 LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUP1G08DBVRE4 TI

完全替代

 LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE

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