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SN74ALVC16373DGG

更新时间： 2024-09-16 21:21:55
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
11页 206K
描述
ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, 0.300 INCH, PLASTIC, TSSOP-48

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SN74ALVC16373DGG 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP,针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.28其他特性：TYP VOLP < 0.8V AT VCC = 3.3V, TA = 25 DEGREE C
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
长度：12.5 mm逻辑集成电路类型：BUS DRIVER
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：5.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
宽度：6.1 mmBase Number Matches：1

SN74ALVC16373DGG 数据手册

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SCAS257B − JANUARY 1993 − REVISED JULY 1995  
DGG OR DL PACKAGE  
(TOP VIEW)  
D Member of the Texas Instruments  
WidebusFamily  
D EPIC (Enhanced-Performance Implanted  
1
48  
47  
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25  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1LE  
1D1  
1D2  
GND  
1D3  
1D4  
CMOS) Submicron Process  
2
D Typical V  
(Output Ground Bounce)  
OLP  
3
< 0.8 V at V  
= 3.3 V, T = 25°C  
CC  
A
4
D Typical V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
5
> 2 V at V  
= 3.3 V, T = 25°C  
A
6
D Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
7
V
V
CC  
CC  
8
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
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23  
24  
D ESD Protection Exceeds 2000 V Per  
MIL-STD-833C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
D Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
D Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2LE  
description  
This 16-bit transparent D-type latch is designed  
for 3.3-V V  
and 3.3-V V  
operation; it is tested at 2.5-V, 2.7-V,  
.
CC  
CC  
The SN74ALVC16373 is particularly suitable  
for implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch.  
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the  
Q outputs are latched at the levels set up at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high-  
or low-logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus  
lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old  
data can be retained or new data can be entered while the outputs are in the high-impedance state.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVC16373 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)  
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the  
same printed-circuit-board area.  
The SN74ALVC16373 is characterized for operation from −40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
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Copyright 1995, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567...11

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与SN74ALVC16373DGG相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVC16373DGGR TI

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 		16-Bit Transparent D-Type Latch With 3-State Outputs 48-TSSOP -40 to 85
SN74ALVC16373DL TI

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 		16-Bit Transparent D-Type Latch With 3-State Outputs 48-SSOP -40 to 85
SN74ALVC16373DLR TI

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 		暂无描述
SN74ALVC16374 TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVC16374DGG TI

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 		暂无描述
SN74ALVC16374DGGR TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVC16374DL TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVC16374DLR TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVC16409 TI

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 		9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS
SN74ALVC16409DGG TI

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 		暂无描述

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